core_cmInstr.h 16 KB

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  1. /**************************************************************************//**
  2. * @file core_cmInstr.h
  3. * @brief CMSIS Cortex-M Core Instruction Access Header File
  4. * @version V3.01
  5. * @date 06. March 2012
  6. *
  7. * @note
  8. * Copyright (C) 2009-2012 ARM Limited. All rights reserved.
  9. *
  10. * @par
  11. * ARM Limited (ARM) is supplying this software for use with Cortex-M
  12. * processor based microcontrollers. This file can be freely distributed
  13. * within development tools that are supporting such ARM based processors.
  14. *
  15. * @par
  16. * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
  17. * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
  18. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
  19. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
  20. * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
  21. *
  22. ******************************************************************************/
  23. #ifndef __CORE_CMINSTR_H
  24. #define __CORE_CMINSTR_H
  25. /* ########################## Core Instruction Access ######################### */
  26. /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
  27. Access to dedicated instructions
  28. @{
  29. */
  30. #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
  31. /* ARM armcc specific functions */
  32. #if (__ARMCC_VERSION < 400677)
  33. #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
  34. #endif
  35. /** \brief No Operation
  36. No Operation does nothing. This instruction can be used for code alignment purposes.
  37. */
  38. #define __NOP __nop
  39. /** \brief Wait For Interrupt
  40. Wait For Interrupt is a hint instruction that suspends execution
  41. until one of a number of events occurs.
  42. */
  43. #define __WFI __wfi
  44. /** \brief Wait For Event
  45. Wait For Event is a hint instruction that permits the processor to enter
  46. a low-power state until one of a number of events occurs.
  47. */
  48. #define __WFE __wfe
  49. /** \brief Send Event
  50. Send Event is a hint instruction. It causes an event to be signaled to the CPU.
  51. */
  52. #define __SEV __sev
  53. /** \brief Instruction Synchronization Barrier
  54. Instruction Synchronization Barrier flushes the pipeline in the processor,
  55. so that all instructions following the ISB are fetched from cache or
  56. memory, after the instruction has been completed.
  57. */
  58. #define __ISB() __isb(0xF)
  59. /** \brief Data Synchronization Barrier
  60. This function acts as a special kind of Data Memory Barrier.
  61. It completes when all explicit memory accesses before this instruction complete.
  62. */
  63. #define __DSB() __dsb(0xF)
  64. /** \brief Data Memory Barrier
  65. This function ensures the apparent order of the explicit memory operations before
  66. and after the instruction, without ensuring their completion.
  67. */
  68. #define __DMB() __dmb(0xF)
  69. /** \brief Reverse byte order (32 bit)
  70. This function reverses the byte order in integer value.
  71. \param [in] value Value to reverse
  72. \return Reversed value
  73. */
  74. #define __REV __rev
  75. /** \brief Reverse byte order (16 bit)
  76. This function reverses the byte order in two unsigned short values.
  77. \param [in] value Value to reverse
  78. \return Reversed value
  79. */
  80. __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
  81. {
  82. rev16 r0, r0
  83. bx lr
  84. }
  85. /** \brief Reverse byte order in signed short value
  86. This function reverses the byte order in a signed short value with sign extension to integer.
  87. \param [in] value Value to reverse
  88. \return Reversed value
  89. */
  90. __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
  91. {
  92. revsh r0, r0
  93. bx lr
  94. }
  95. /** \brief Rotate Right in unsigned value (32 bit)
  96. This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
  97. \param [in] value Value to rotate
  98. \param [in] value Number of Bits to rotate
  99. \return Rotated value
  100. */
  101. #define __ROR __ror
  102. #if (__CORTEX_M >= 0x03)
  103. /** \brief Reverse bit order of value
  104. This function reverses the bit order of the given value.
  105. \param [in] value Value to reverse
  106. \return Reversed value
  107. */
  108. #define __RBIT __rbit
  109. /** \brief LDR Exclusive (8 bit)
  110. This function performs a exclusive LDR command for 8 bit value.
  111. \param [in] ptr Pointer to data
  112. \return value of type uint8_t at (*ptr)
  113. */
  114. #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
  115. /** \brief LDR Exclusive (16 bit)
  116. This function performs a exclusive LDR command for 16 bit values.
  117. \param [in] ptr Pointer to data
  118. \return value of type uint16_t at (*ptr)
  119. */
  120. #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
  121. /** \brief LDR Exclusive (32 bit)
  122. This function performs a exclusive LDR command for 32 bit values.
  123. \param [in] ptr Pointer to data
  124. \return value of type uint32_t at (*ptr)
  125. */
  126. #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
  127. /** \brief STR Exclusive (8 bit)
  128. This function performs a exclusive STR command for 8 bit values.
  129. \param [in] value Value to store
  130. \param [in] ptr Pointer to location
  131. \return 0 Function succeeded
  132. \return 1 Function failed
  133. */
  134. #define __STREXB(value, ptr) __strex(value, ptr)
  135. /** \brief STR Exclusive (16 bit)
  136. This function performs a exclusive STR command for 16 bit values.
  137. \param [in] value Value to store
  138. \param [in] ptr Pointer to location
  139. \return 0 Function succeeded
  140. \return 1 Function failed
  141. */
  142. #define __STREXH(value, ptr) __strex(value, ptr)
  143. /** \brief STR Exclusive (32 bit)
  144. This function performs a exclusive STR command for 32 bit values.
  145. \param [in] value Value to store
  146. \param [in] ptr Pointer to location
  147. \return 0 Function succeeded
  148. \return 1 Function failed
  149. */
  150. #define __STREXW(value, ptr) __strex(value, ptr)
  151. /** \brief Remove the exclusive lock
  152. This function removes the exclusive lock which is created by LDREX.
  153. */
  154. #define __CLREX __clrex
  155. /** \brief Signed Saturate
  156. This function saturates a signed value.
  157. \param [in] value Value to be saturated
  158. \param [in] sat Bit position to saturate to (1..32)
  159. \return Saturated value
  160. */
  161. #define __SSAT __ssat
  162. /** \brief Unsigned Saturate
  163. This function saturates an unsigned value.
  164. \param [in] value Value to be saturated
  165. \param [in] sat Bit position to saturate to (0..31)
  166. \return Saturated value
  167. */
  168. #define __USAT __usat
  169. /** \brief Count leading zeros
  170. This function counts the number of leading zeros of a data value.
  171. \param [in] value Value to count the leading zeros
  172. \return number of leading zeros in value
  173. */
  174. #define __CLZ __clz
  175. #endif /* (__CORTEX_M >= 0x03) */
  176. #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
  177. /* IAR iccarm specific functions */
  178. #include <cmsis_iar.h>
  179. #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
  180. /* TI CCS specific functions */
  181. #include <cmsis_ccs.h>
  182. #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
  183. /* GNU gcc specific functions */
  184. /** \brief No Operation
  185. No Operation does nothing. This instruction can be used for code alignment purposes.
  186. */
  187. __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
  188. {
  189. __ASM volatile ("nop");
  190. }
  191. /** \brief Wait For Interrupt
  192. Wait For Interrupt is a hint instruction that suspends execution
  193. until one of a number of events occurs.
  194. */
  195. __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
  196. {
  197. __ASM volatile ("wfi");
  198. }
  199. /** \brief Wait For Event
  200. Wait For Event is a hint instruction that permits the processor to enter
  201. a low-power state until one of a number of events occurs.
  202. */
  203. __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
  204. {
  205. __ASM volatile ("wfe");
  206. }
  207. /** \brief Send Event
  208. Send Event is a hint instruction. It causes an event to be signaled to the CPU.
  209. */
  210. __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
  211. {
  212. __ASM volatile ("sev");
  213. }
  214. /** \brief Instruction Synchronization Barrier
  215. Instruction Synchronization Barrier flushes the pipeline in the processor,
  216. so that all instructions following the ISB are fetched from cache or
  217. memory, after the instruction has been completed.
  218. */
  219. __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
  220. {
  221. __ASM volatile ("isb");
  222. }
  223. /** \brief Data Synchronization Barrier
  224. This function acts as a special kind of Data Memory Barrier.
  225. It completes when all explicit memory accesses before this instruction complete.
  226. */
  227. __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
  228. {
  229. __ASM volatile ("dsb");
  230. }
  231. /** \brief Data Memory Barrier
  232. This function ensures the apparent order of the explicit memory operations before
  233. and after the instruction, without ensuring their completion.
  234. */
  235. __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
  236. {
  237. __ASM volatile ("dmb");
  238. }
  239. /** \brief Reverse byte order (32 bit)
  240. This function reverses the byte order in integer value.
  241. \param [in] value Value to reverse
  242. \return Reversed value
  243. */
  244. __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
  245. {
  246. uint32_t result;
  247. __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
  248. return(result);
  249. }
  250. /** \brief Reverse byte order (16 bit)
  251. This function reverses the byte order in two unsigned short values.
  252. \param [in] value Value to reverse
  253. \return Reversed value
  254. */
  255. __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
  256. {
  257. uint32_t result;
  258. __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
  259. return(result);
  260. }
  261. /** \brief Reverse byte order in signed short value
  262. This function reverses the byte order in a signed short value with sign extension to integer.
  263. \param [in] value Value to reverse
  264. \return Reversed value
  265. */
  266. __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
  267. {
  268. uint32_t result;
  269. __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
  270. return(result);
  271. }
  272. /** \brief Rotate Right in unsigned value (32 bit)
  273. This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
  274. \param [in] value Value to rotate
  275. \param [in] value Number of Bits to rotate
  276. \return Rotated value
  277. */
  278. __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
  279. {
  280. __ASM volatile ("ror %0, %0, %1" : "+r" (op1) : "r" (op2) );
  281. return(op1);
  282. }
  283. #if (__CORTEX_M >= 0x03)
  284. /** \brief Reverse bit order of value
  285. This function reverses the bit order of the given value.
  286. \param [in] value Value to reverse
  287. \return Reversed value
  288. */
  289. __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
  290. {
  291. uint32_t result;
  292. __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
  293. return(result);
  294. }
  295. /** \brief LDR Exclusive (8 bit)
  296. This function performs a exclusive LDR command for 8 bit value.
  297. \param [in] ptr Pointer to data
  298. \return value of type uint8_t at (*ptr)
  299. */
  300. __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
  301. {
  302. uint8_t result;
  303. __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
  304. return(result);
  305. }
  306. /** \brief LDR Exclusive (16 bit)
  307. This function performs a exclusive LDR command for 16 bit values.
  308. \param [in] ptr Pointer to data
  309. \return value of type uint16_t at (*ptr)
  310. */
  311. __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
  312. {
  313. uint16_t result;
  314. __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
  315. return(result);
  316. }
  317. /** \brief LDR Exclusive (32 bit)
  318. This function performs a exclusive LDR command for 32 bit values.
  319. \param [in] ptr Pointer to data
  320. \return value of type uint32_t at (*ptr)
  321. */
  322. __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
  323. {
  324. uint32_t result;
  325. __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
  326. return(result);
  327. }
  328. /** \brief STR Exclusive (8 bit)
  329. This function performs a exclusive STR command for 8 bit values.
  330. \param [in] value Value to store
  331. \param [in] ptr Pointer to location
  332. \return 0 Function succeeded
  333. \return 1 Function failed
  334. */
  335. __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
  336. {
  337. uint32_t result;
  338. __ASM volatile ("strexb %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
  339. return(result);
  340. }
  341. /** \brief STR Exclusive (16 bit)
  342. This function performs a exclusive STR command for 16 bit values.
  343. \param [in] value Value to store
  344. \param [in] ptr Pointer to location
  345. \return 0 Function succeeded
  346. \return 1 Function failed
  347. */
  348. __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
  349. {
  350. uint32_t result;
  351. __ASM volatile ("strexh %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
  352. return(result);
  353. }
  354. /** \brief STR Exclusive (32 bit)
  355. This function performs a exclusive STR command for 32 bit values.
  356. \param [in] value Value to store
  357. \param [in] ptr Pointer to location
  358. \return 0 Function succeeded
  359. \return 1 Function failed
  360. */
  361. __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
  362. {
  363. uint32_t result;
  364. __ASM volatile ("strex %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
  365. return(result);
  366. }
  367. /** \brief Remove the exclusive lock
  368. This function removes the exclusive lock which is created by LDREX.
  369. */
  370. __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
  371. {
  372. __ASM volatile ("clrex");
  373. }
  374. /** \brief Signed Saturate
  375. This function saturates a signed value.
  376. \param [in] value Value to be saturated
  377. \param [in] sat Bit position to saturate to (1..32)
  378. \return Saturated value
  379. */
  380. #define __SSAT(ARG1,ARG2) \
  381. ({ \
  382. uint32_t __RES, __ARG1 = (ARG1); \
  383. __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
  384. __RES; \
  385. })
  386. /** \brief Unsigned Saturate
  387. This function saturates an unsigned value.
  388. \param [in] value Value to be saturated
  389. \param [in] sat Bit position to saturate to (0..31)
  390. \return Saturated value
  391. */
  392. #define __USAT(ARG1,ARG2) \
  393. ({ \
  394. uint32_t __RES, __ARG1 = (ARG1); \
  395. __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
  396. __RES; \
  397. })
  398. /** \brief Count leading zeros
  399. This function counts the number of leading zeros of a data value.
  400. \param [in] value Value to count the leading zeros
  401. \return number of leading zeros in value
  402. */
  403. __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
  404. {
  405. uint8_t result;
  406. __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
  407. return(result);
  408. }
  409. #endif /* (__CORTEX_M >= 0x03) */
  410. #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
  411. /* TASKING carm specific functions */
  412. /*
  413. * The CMSIS functions have been implemented as intrinsics in the compiler.
  414. * Please use "carm -?i" to get an up to date list of all intrinsics,
  415. * Including the CMSIS ones.
  416. */
  417. #endif
  418. /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
  419. #endif /* __CORE_CMINSTR_H */