stm32f2xx_rng.c 13 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f2xx_rng.c
  4. * @author MCD Application Team
  5. * @version V1.1.3
  6. * @date 31-December-2021
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Random Number Generator (RNG) peripheral:
  9. * - Initialization and Configuration
  10. * - Get 32 bit Random number
  11. * - Interrupts and flags management
  12. *
  13. * @verbatim
  14. *
  15. * ===================================================================
  16. * How to use this driver
  17. * ===================================================================
  18. * 1. Enable The RNG controller clock using
  19. * RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_RNG, ENABLE) function.
  20. *
  21. * 2. Activate the RNG peripheral using RNG_Cmd() function.
  22. *
  23. * 3. Wait until the 32 bit Random number Generator contains a valid
  24. * random data (using polling/interrupt mode). For more details,
  25. * refer to "Interrupts and flags management functions" module
  26. * description.
  27. *
  28. * 4. Get the 32 bit Random number using RNG_GetRandomNumber() function
  29. *
  30. * 5. To get another 32 bit Random number, go to step 3.
  31. *
  32. *
  33. *
  34. * @endverbatim
  35. *
  36. ******************************************************************************
  37. * @attention
  38. *
  39. * Copyright (c) 2012 STMicroelectronics.
  40. * All rights reserved.
  41. *
  42. * This software is licensed under terms that can be found in the LICENSE file
  43. * in the root directory of this software component.
  44. * If no LICENSE file comes with this software, it is provided AS-IS.
  45. *
  46. ******************************************************************************
  47. */
  48. /* Includes ------------------------------------------------------------------*/
  49. #include "stm32f2xx_rng.h"
  50. #include "stm32f2xx_rcc.h"
  51. /** @addtogroup STM32F2xx_StdPeriph_Driver
  52. * @{
  53. */
  54. /** @defgroup RNG
  55. * @brief RNG driver modules
  56. * @{
  57. */
  58. /* Private typedef -----------------------------------------------------------*/
  59. /* Private define ------------------------------------------------------------*/
  60. /* Private macro -------------------------------------------------------------*/
  61. /* Private variables ---------------------------------------------------------*/
  62. /* Private function prototypes -----------------------------------------------*/
  63. /* Private functions ---------------------------------------------------------*/
  64. /** @defgroup RNG_Private_Functions
  65. * @{
  66. */
  67. /** @defgroup RNG_Group1 Initialization and Configuration functions
  68. * @brief Initialization and Configuration functions
  69. *
  70. @verbatim
  71. ===============================================================================
  72. Initialization and Configuration functions
  73. ===============================================================================
  74. This section provides functions allowing to
  75. - Initialize the RNG peripheral
  76. - Enable or disable the RNG peripheral
  77. @endverbatim
  78. * @{
  79. */
  80. /**
  81. * @brief Deinitializes the RNG peripheral registers to their default reset values.
  82. * @param None
  83. * @retval None
  84. */
  85. void RNG_DeInit(void)
  86. {
  87. /* Enable RNG reset state */
  88. RCC_AHB2PeriphResetCmd(RCC_AHB2Periph_RNG, ENABLE);
  89. /* Release RNG from reset state */
  90. RCC_AHB2PeriphResetCmd(RCC_AHB2Periph_RNG, DISABLE);
  91. }
  92. /**
  93. * @brief Enables or disables the RNG peripheral.
  94. * @param NewState: new state of the RNG peripheral.
  95. * This parameter can be: ENABLE or DISABLE.
  96. * @retval None
  97. */
  98. void RNG_Cmd(FunctionalState NewState)
  99. {
  100. /* Check the parameters */
  101. assert_param(IS_FUNCTIONAL_STATE(NewState));
  102. if (NewState != DISABLE)
  103. {
  104. /* Enable the RNG */
  105. RNG->CR |= RNG_CR_RNGEN;
  106. }
  107. else
  108. {
  109. /* Disable the RNG */
  110. RNG->CR &= ~RNG_CR_RNGEN;
  111. }
  112. }
  113. /**
  114. * @}
  115. */
  116. /** @defgroup RNG_Group2 Get 32 bit Random number function
  117. * @brief Get 32 bit Random number function
  118. *
  119. @verbatim
  120. ===============================================================================
  121. Get 32 bit Random number function
  122. ===============================================================================
  123. This section provides a function allowing to get the 32 bit Random number
  124. @note Before to call this function you have to wait till DRDY flag is set,
  125. using RNG_GetFlagStatus(RNG_FLAG_DRDY) function.
  126. @endverbatim
  127. * @{
  128. */
  129. /**
  130. * @brief Returns a 32-bit random number.
  131. *
  132. * @note Before to call this function you have to wait till DRDY (data ready)
  133. * flag is set, using RNG_GetFlagStatus(RNG_FLAG_DRDY) function.
  134. * @note Each time the the Random number data is read (using RNG_GetRandomNumber()
  135. * function), the RNG_FLAG_DRDY flag is automatically cleared.
  136. * @note In the case of a seed error, the generation of random numbers is
  137. * interrupted for as long as the SECS bit is '1'. If a number is
  138. * available in the RNG_DR register, it must not be used because it may
  139. * not have enough entropy. In this case, it is recommended to clear the
  140. * SEIS bit(using RNG_ClearFlag(RNG_FLAG_SECS) function), then disable
  141. * and enable the RNG peripheral (using RNG_Cmd() function) to
  142. * reinitialize and restart the RNG.
  143. * @note In the case of a clock error, the RNG is no more able to generate
  144. * random numbers because the PLL48CLK clock is not correct. User have
  145. * to check that the clock controller is correctly configured to provide
  146. * the RNG clock and clear the CEIS bit (using RNG_ClearFlag(RNG_FLAG_CECS)
  147. * function) . The clock error has no impact on the previously generated
  148. * random numbers, and the RNG_DR register contents can be used.
  149. *
  150. * @param None
  151. * @retval 32-bit random number.
  152. */
  153. uint32_t RNG_GetRandomNumber(void)
  154. {
  155. /* Return the 32 bit random number from the DR register */
  156. return RNG->DR;
  157. }
  158. /**
  159. * @}
  160. */
  161. /** @defgroup RNG_Group3 Interrupts and flags management functions
  162. * @brief Interrupts and flags management functions
  163. *
  164. @verbatim
  165. ===============================================================================
  166. Interrupts and flags management functions
  167. ===============================================================================
  168. This section provides functions allowing to configure the RNG Interrupts and
  169. to get the status and clear flags and Interrupts pending bits.
  170. The RNG provides 3 Interrupts sources and 3 Flags:
  171. Flags :
  172. ----------
  173. 1. RNG_FLAG_DRDY : In the case of the RNG_DR register contains valid
  174. random data. it is cleared by reading the valid data
  175. (using RNG_GetRandomNumber() function).
  176. 2. RNG_FLAG_CECS : In the case of a seed error detection.
  177. 3. RNG_FLAG_SECS : In the case of a clock error detection.
  178. Interrupts :
  179. ------------
  180. if enabled, an RNG interrupt is pending :
  181. 1. In the case of the RNG_DR register contains valid random data.
  182. This interrupt source is cleared once the RNG_DR register has been read
  183. (using RNG_GetRandomNumber() function) until a new valid value is
  184. computed.
  185. or
  186. 2. In the case of a seed error : One of the following faulty sequences has
  187. been detected:
  188. - More than 64 consecutive bits at the same value (0 or 1)
  189. - More than 32 consecutive alternance of 0 and 1 (0101010101...01)
  190. This interrupt source is cleared using RNG_ClearITPendingBit(RNG_IT_SEI)
  191. function.
  192. or
  193. 3. In the case of a clock error : the PLL48CLK (RNG peripheral clock source)
  194. was not correctly detected (fPLL48CLK< fHCLK/16).
  195. This interrupt source is cleared using RNG_ClearITPendingBit(RNG_IT_CEI)
  196. function.
  197. @note In this case, User have to check that the clock controller is
  198. correctly configured to provide the RNG clock.
  199. Managing the RNG controller events :
  200. ------------------------------------
  201. The user should identify which mode will be used in his application to manage
  202. the RNG controller events: Polling mode or Interrupt mode.
  203. 1. In the Polling Mode it is advised to use the following functions:
  204. - RNG_GetFlagStatus() : to check if flags events occur.
  205. - RNG_ClearFlag() : to clear the flags events.
  206. @note RNG_FLAG_DRDY can not be cleared by RNG_ClearFlag(). it is cleared only
  207. by reading the Random number data.
  208. 2. In the Interrupt Mode it is advised to use the following functions:
  209. - RNG_ITConfig() : to enable or disable the interrupt source.
  210. - RNG_GetITStatus() : to check if Interrupt occurs.
  211. - RNG_ClearITPendingBit() : to clear the Interrupt pending Bit
  212. (corresponding Flag).
  213. @endverbatim
  214. * @{
  215. */
  216. /**
  217. * @brief Enables or disables the RNG interrupt.
  218. * @note The RNG provides 3 interrupt sources,
  219. * - Computed data is ready event (DRDY), and
  220. * - Seed error Interrupt (SEI) and
  221. * - Clock error Interrupt (CEI),
  222. * all these interrupts sources are enabled by setting the IE bit in
  223. * CR register. However, each interrupt have its specific status bit
  224. * (see RNG_GetITStatus() function) and clear bit except the DRDY event
  225. * (see RNG_ClearITPendingBit() function).
  226. * @param NewState: new state of the RNG interrupt.
  227. * This parameter can be: ENABLE or DISABLE.
  228. * @retval None
  229. */
  230. void RNG_ITConfig(FunctionalState NewState)
  231. {
  232. /* Check the parameters */
  233. assert_param(IS_FUNCTIONAL_STATE(NewState));
  234. if (NewState != DISABLE)
  235. {
  236. /* Enable the RNG interrupt */
  237. RNG->CR |= RNG_CR_IE;
  238. }
  239. else
  240. {
  241. /* Disable the RNG interrupt */
  242. RNG->CR &= ~RNG_CR_IE;
  243. }
  244. }
  245. /**
  246. * @brief Checks whether the specified RNG flag is set or not.
  247. * @param RNG_FLAG: specifies the RNG flag to check.
  248. * This parameter can be one of the following values:
  249. * @arg RNG_FLAG_DRDY: Data Ready flag.
  250. * @arg RNG_FLAG_CECS: Clock Error Current flag.
  251. * @arg RNG_FLAG_SECS: Seed Error Current flag.
  252. * @retval The new state of RNG_FLAG (SET or RESET).
  253. */
  254. FlagStatus RNG_GetFlagStatus(uint8_t RNG_FLAG)
  255. {
  256. FlagStatus bitstatus = RESET;
  257. /* Check the parameters */
  258. assert_param(IS_RNG_GET_FLAG(RNG_FLAG));
  259. /* Check the status of the specified RNG flag */
  260. if ((RNG->SR & RNG_FLAG) != (uint8_t)RESET)
  261. {
  262. /* RNG_FLAG is set */
  263. bitstatus = SET;
  264. }
  265. else
  266. {
  267. /* RNG_FLAG is reset */
  268. bitstatus = RESET;
  269. }
  270. /* Return the RNG_FLAG status */
  271. return bitstatus;
  272. }
  273. /**
  274. * @brief Clears the RNG flags.
  275. * @param RNG_FLAG: specifies the flag to clear.
  276. * This parameter can be any combination of the following values:
  277. * @arg RNG_FLAG_CECS: Clock Error Current flag.
  278. * @arg RNG_FLAG_SECS: Seed Error Current flag.
  279. * @note RNG_FLAG_DRDY can not be cleared by RNG_ClearFlag() function.
  280. * This flag is cleared only by reading the Random number data (using
  281. * RNG_GetRandomNumber() function).
  282. * @retval None
  283. */
  284. void RNG_ClearFlag(uint8_t RNG_FLAG)
  285. {
  286. /* Check the parameters */
  287. assert_param(IS_RNG_CLEAR_FLAG(RNG_FLAG));
  288. /* Clear the selected RNG flags */
  289. RNG->SR = ~(uint32_t)(((uint32_t)RNG_FLAG) << 4);
  290. }
  291. /**
  292. * @brief Checks whether the specified RNG interrupt has occurred or not.
  293. * @param RNG_IT: specifies the RNG interrupt source to check.
  294. * This parameter can be one of the following values:
  295. * @arg RNG_IT_CEI: Clock Error Interrupt.
  296. * @arg RNG_IT_SEI: Seed Error Interrupt.
  297. * @retval The new state of RNG_IT (SET or RESET).
  298. */
  299. ITStatus RNG_GetITStatus(uint8_t RNG_IT)
  300. {
  301. ITStatus bitstatus = RESET;
  302. /* Check the parameters */
  303. assert_param(IS_RNG_GET_IT(RNG_IT));
  304. /* Check the status of the specified RNG interrupt */
  305. if ((RNG->SR & RNG_IT) != (uint8_t)RESET)
  306. {
  307. /* RNG_IT is set */
  308. bitstatus = SET;
  309. }
  310. else
  311. {
  312. /* RNG_IT is reset */
  313. bitstatus = RESET;
  314. }
  315. /* Return the RNG_IT status */
  316. return bitstatus;
  317. }
  318. /**
  319. * @brief Clears the RNG interrupt pending bit(s).
  320. * @param RNG_IT: specifies the RNG interrupt pending bit(s) to clear.
  321. * This parameter can be any combination of the following values:
  322. * @arg RNG_IT_CEI: Clock Error Interrupt.
  323. * @arg RNG_IT_SEI: Seed Error Interrupt.
  324. * @retval None
  325. */
  326. void RNG_ClearITPendingBit(uint8_t RNG_IT)
  327. {
  328. /* Check the parameters */
  329. assert_param(IS_RNG_IT(RNG_IT));
  330. /* Clear the selected RNG interrupt pending bit */
  331. RNG->SR = (uint8_t)~RNG_IT;
  332. }
  333. /**
  334. * @}
  335. */
  336. /**
  337. * @}
  338. */
  339. /**
  340. * @}
  341. */
  342. /**
  343. * @}
  344. */