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  1. <!doctype html public "-//w3c//dtd html 4.0 transitional//en">
    2. 

  2. <html><head>
    3. 

  3. <title>Static Call Graph - [..\OBJ\bootloader.axf]</title></head>
    4. 

  4. <body><HR>
    5. 

  5. <H1>Static Call Graph for image ..\OBJ\bootloader.axf</H1><HR>
    6. 

  6. <BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060750: Last Updated: Wed Apr 10 15:19:51 2024
    7. 

  7. <BR><P>
    8. 

  8. <H3>Maximum Stack Usage =        352 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
    9. 

  9. Call chain for Maximum Stack Depth:</H3>
    10. 

  10. main &rArr; read_bin_txt &rArr; extract_data_from_buffer &rArr; __0sscanf &rArr; __vfscanf_char &rArr; __vfscanf &rArr; _scanf_int
    11. 

  11. <P>
    12. 

  12. <H3>
    13. 

  13. Mutually Recursive functions
    14. 

  14. </H3> <LI><a href="#[1c]">ADC0_1_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1c]">ADC0_1_IRQHandler</a><BR>
    15. 

  15. </UL>
    16. 

  16. <P>
    17. 

  17. <H3>
    18. 

  18. Function Pointers
    19. 

  19. </H3><UL>
    20. 

  20.  <LI><a href="#[1c]">ADC0_1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    21. 

  21.  <LI><a href="#[39]">ADC2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    22. 

  22.  <LI><a href="#[4]">BusFault_Handler</a> from gd32f10x_it.o(i.BusFault_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    23. 

  23.  <LI><a href="#[20]">CAN0_EWMC_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    24. 

  24.  <LI><a href="#[1f]">CAN0_RX1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    25. 

  25.  <LI><a href="#[15]">DMA0_Channel0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    26. 

  26.  <LI><a href="#[16]">DMA0_Channel1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    27. 

  27.  <LI><a href="#[17]">DMA0_Channel2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    28. 

  28.  <LI><a href="#[18]">DMA0_Channel3_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    29. 

  29.  <LI><a href="#[19]">DMA0_Channel4_IRQHandler</a> from ec800.o(i.DMA0_Channel4_IRQHandler) referenced from startup_gd32f10x_xd.o(RESET)
    30. 

  30.  <LI><a href="#[1a]">DMA0_Channel5_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    31. 

  31.  <LI><a href="#[1b]">DMA0_Channel6_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    32. 

  32.  <LI><a href="#[42]">DMA1_Channel0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    33. 

  33.  <LI><a href="#[43]">DMA1_Channel1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    34. 

  34.  <LI><a href="#[44]">DMA1_Channel2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    35. 

  35.  <LI><a href="#[45]">DMA1_Channel3_4_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    36. 

  36.  <LI><a href="#[7]">DebugMon_Handler</a> from gd32f10x_it.o(i.DebugMon_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    37. 

  37.  <LI><a href="#[3a]">EXMC_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    38. 

  38.  <LI><a href="#[10]">EXTI0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    39. 

  39.  <LI><a href="#[32]">EXTI10_15_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    40. 

  40.  <LI><a href="#[11]">EXTI1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    41. 

  41.  <LI><a href="#[12]">EXTI2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    42. 

  42.  <LI><a href="#[13]">EXTI3_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    43. 

  43.  <LI><a href="#[14]">EXTI4_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    44. 

  44.  <LI><a href="#[21]">EXTI5_9_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    45. 

  45.  <LI><a href="#[e]">FMC_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    46. 

  46.  <LI><a href="#[2]">HardFault_Handler</a> from gd32f10x_it.o(i.HardFault_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    47. 

  47.  <LI><a href="#[2a]">I2C0_ER_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    48. 

  48.  <LI><a href="#[29]">I2C0_EV_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    49. 

  49.  <LI><a href="#[2c]">I2C1_ER_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    50. 

  50.  <LI><a href="#[2b]">I2C1_EV_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    51. 

  51.  <LI><a href="#[b]">LVD_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    52. 

  52.  <LI><a href="#[3]">MemManage_Handler</a> from gd32f10x_it.o(i.MemManage_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    53. 

  53.  <LI><a href="#[1]">NMI_Handler</a> from gd32f10x_it.o(i.NMI_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    54. 

  54.  <LI><a href="#[8]">PendSV_Handler</a> from gd32f10x_it.o(i.PendSV_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    55. 

  55.  <LI><a href="#[f]">RCU_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    56. 

  56.  <LI><a href="#[33]">RTC_Alarm_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    57. 

  57.  <LI><a href="#[d]">RTC_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    58. 

  58.  <LI><a href="#[0]">Reset_Handler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    59. 

  59.  <LI><a href="#[3b]">SDIO_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    60. 

  60.  <LI><a href="#[2d]">SPI0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    61. 

  61.  <LI><a href="#[2e]">SPI1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    62. 

  62.  <LI><a href="#[3d]">SPI2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    63. 

  63.  <LI><a href="#[6]">SVC_Handler</a> from gd32f10x_it.o(i.SVC_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    64. 

  64.  <LI><a href="#[9]">SysTick_Handler</a> from gd32f10x_it.o(i.SysTick_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    65. 

  65.  <LI><a href="#[47]">SystemInit</a> from system_gd32f10x.o(i.SystemInit) referenced from startup_gd32f10x_xd.o(.text)
    66. 

  66.  <LI><a href="#[c]">TAMPER_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    67. 

  67.  <LI><a href="#[22]">TIMER0_BRK_TIMER8_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    68. 

  68.  <LI><a href="#[25]">TIMER0_Channel_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    69. 

  69.  <LI><a href="#[24]">TIMER0_TRG_CMT_TIMER10_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    70. 

  70.  <LI><a href="#[23]">TIMER0_UP_TIMER9_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    71. 

  71.  <LI><a href="#[26]">TIMER1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    72. 

  72.  <LI><a href="#[27]">TIMER2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    73. 

  73.  <LI><a href="#[28]">TIMER3_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    74. 

  74.  <LI><a href="#[3c]">TIMER4_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    75. 

  75.  <LI><a href="#[40]">TIMER5_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    76. 

  76.  <LI><a href="#[41]">TIMER6_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    77. 

  77.  <LI><a href="#[35]">TIMER7_BRK_TIMER11_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    78. 

  78.  <LI><a href="#[38]">TIMER7_Channel_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    79. 

  79.  <LI><a href="#[37]">TIMER7_TRG_CMT_TIMER13_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    80. 

  80.  <LI><a href="#[36]">TIMER7_UP_TIMER12_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    81. 

  81.  <LI><a href="#[3e]">UART3_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    82. 

  82.  <LI><a href="#[3f]">UART4_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    83. 

  83.  <LI><a href="#[2f]">USART0_IRQHandler</a> from ec800.o(i.USART0_IRQHandler) referenced from startup_gd32f10x_xd.o(RESET)
    84. 

  84.  <LI><a href="#[30]">USART1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    85. 

  85.  <LI><a href="#[31]">USART2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    86. 

  86.  <LI><a href="#[1d]">USBD_HP_CAN0_TX_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    87. 

  87.  <LI><a href="#[1e]">USBD_LP_CAN0_RX0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    88. 

  88.  <LI><a href="#[34]">USBD_WKUP_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    89. 

  89.  <LI><a href="#[5]">UsageFault_Handler</a> from gd32f10x_it.o(i.UsageFault_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    90. 

  90.  <LI><a href="#[a]">WWDGT_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    91. 

  91.  <LI><a href="#[48]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_gd32f10x_xd.o(.text)
    92. 

  92.  <LI><a href="#[4a]">_sbackspace</a> from _sgetc.o(.text) referenced from __0sscanf.o(.text)
    93. 

  93.  <LI><a href="#[4b]">_scanf_char_input</a> from scanf_char.o(.text) referenced from scanf_char.o(.text)
    94. 

  94.  <LI><a href="#[49]">_sgetc</a> from _sgetc.o(.text) referenced from __0sscanf.o(.text)
    95. 

  95.  <LI><a href="#[4d]">_sputc</a> from printf2.o(i._sputc) referenced from printf2.o(i.__0sprintf$2)
    96. 

  96.  <LI><a href="#[4c]">isspace</a> from isspace_c.o(.text) referenced from scanf_char.o(.text)
    97. 

  97.  <LI><a href="#[46]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
    98. 

  98. </UL>
    99. 

  99. <P>
    100. 

  100. <H3>
    101. 

  101. Global Symbols
    102. 

  102. </H3>
    103. 

  103. <P><STRONG><a name="[48]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
    104. 

  104. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(.text)
    105. 

  105. </UL>
    106. 

  106. <P><STRONG><a name="[b1]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))
    107. 

  107. 

  108. <P><STRONG><a name="[4e]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    109. 

  109. <BR><BR>[Calls]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    110. 

  110. </UL>
    111. 

  111. 

  112. <P><STRONG><a name="[58]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    113. 

  113. <BR><BR>[Called By]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    114. 

  114. </UL>
    115. 

  115. 

  116. <P><STRONG><a name="[b2]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))
    117. 

  117. 

  118. <P><STRONG><a name="[b3]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))
    119. 

  119. 

  120. <P><STRONG><a name="[b4]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))
    121. 

  121. 

  122. <P><STRONG><a name="[b5]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))
    123. 

  123. 

  124. <P><STRONG><a name="[b6]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))
    125. 

  125. 

  126. <P><STRONG><a name="[7b]"></a>MSR_SP</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, boot.o(.emb_text))
    127. 

  127. <BR><BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LOAD_A
    128. 

  128. </UL>
    129. 

  129. 

  130. <P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    131. 

  131. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    132. 

  132. </UL>
    133. 

  133. <P><STRONG><a name="[1c]"></a>ADC0_1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    134. 

  134. <BR><BR>[Calls]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC0_1_IRQHandler
    135. 

  135. </UL>
    136. 

  136. <BR>[Called By]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC0_1_IRQHandler
    137. 

  137. </UL>
    138. 

  138. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    139. 

  139. </UL>
    140. 

  140. <P><STRONG><a name="[39]"></a>ADC2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    141. 

  141. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    142. 

  142. </UL>
    143. 

  143. <P><STRONG><a name="[20]"></a>CAN0_EWMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    144. 

  144. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    145. 

  145. </UL>
    146. 

  146. <P><STRONG><a name="[1f]"></a>CAN0_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    147. 

  147. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    148. 

  148. </UL>
    149. 

  149. <P><STRONG><a name="[15]"></a>DMA0_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    150. 

  150. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    151. 

  151. </UL>
    152. 

  152. <P><STRONG><a name="[16]"></a>DMA0_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    153. 

  153. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    154. 

  154. </UL>
    155. 

  155. <P><STRONG><a name="[17]"></a>DMA0_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    156. 

  156. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    157. 

  157. </UL>
    158. 

  158. <P><STRONG><a name="[18]"></a>DMA0_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    159. 

  159. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    160. 

  160. </UL>
    161. 

  161. <P><STRONG><a name="[1a]"></a>DMA0_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    162. 

  162. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    163. 

  163. </UL>
    164. 

  164. <P><STRONG><a name="[1b]"></a>DMA0_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    165. 

  165. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    166. 

  166. </UL>
    167. 

  167. <P><STRONG><a name="[42]"></a>DMA1_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    168. 

  168. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    169. 

  169. </UL>
    170. 

  170. <P><STRONG><a name="[43]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    171. 

  171. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    172. 

  172. </UL>
    173. 

  173. <P><STRONG><a name="[44]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    174. 

  174. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    175. 

  175. </UL>
    176. 

  176. <P><STRONG><a name="[45]"></a>DMA1_Channel3_4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    177. 

  177. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    178. 

  178. </UL>
    179. 

  179. <P><STRONG><a name="[3a]"></a>EXMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    180. 

  180. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    181. 

  181. </UL>
    182. 

  182. <P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    183. 

  183. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    184. 

  184. </UL>
    185. 

  185. <P><STRONG><a name="[32]"></a>EXTI10_15_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    186. 

  186. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    187. 

  187. </UL>
    188. 

  188. <P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    189. 

  189. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    190. 

  190. </UL>
    191. 

  191. <P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    192. 

  192. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    193. 

  193. </UL>
    194. 

  194. <P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    195. 

  195. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    196. 

  196. </UL>
    197. 

  197. <P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    198. 

  198. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    199. 

  199. </UL>
    200. 

  200. <P><STRONG><a name="[21]"></a>EXTI5_9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    201. 

  201. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    202. 

  202. </UL>
    203. 

  203. <P><STRONG><a name="[e]"></a>FMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    204. 

  204. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    205. 

  205. </UL>
    206. 

  206. <P><STRONG><a name="[2a]"></a>I2C0_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    207. 

  207. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    208. 

  208. </UL>
    209. 

  209. <P><STRONG><a name="[29]"></a>I2C0_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    210. 

  210. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    211. 

  211. </UL>
    212. 

  212. <P><STRONG><a name="[2c]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    213. 

  213. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    214. 

  214. </UL>
    215. 

  215. <P><STRONG><a name="[2b]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    216. 

  216. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    217. 

  217. </UL>
    218. 

  218. <P><STRONG><a name="[b]"></a>LVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    219. 

  219. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    220. 

  220. </UL>
    221. 

  221. <P><STRONG><a name="[f]"></a>RCU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    222. 

  222. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    223. 

  223. </UL>
    224. 

  224. <P><STRONG><a name="[33]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    225. 

  225. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    226. 

  226. </UL>
    227. 

  227. <P><STRONG><a name="[d]"></a>RTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    228. 

  228. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    229. 

  229. </UL>
    230. 

  230. <P><STRONG><a name="[3b]"></a>SDIO_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    231. 

  231. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    232. 

  232. </UL>
    233. 

  233. <P><STRONG><a name="[2d]"></a>SPI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    234. 

  234. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    235. 

  235. </UL>
    236. 

  236. <P><STRONG><a name="[2e]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    237. 

  237. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    238. 

  238. </UL>
    239. 

  239. <P><STRONG><a name="[3d]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    240. 

  240. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    241. 

  241. </UL>
    242. 

  242. <P><STRONG><a name="[c]"></a>TAMPER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    243. 

  243. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    244. 

  244. </UL>
    245. 

  245. <P><STRONG><a name="[22]"></a>TIMER0_BRK_TIMER8_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    246. 

  246. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    247. 

  247. </UL>
    248. 

  248. <P><STRONG><a name="[25]"></a>TIMER0_Channel_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    249. 

  249. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    250. 

  250. </UL>
    251. 

  251. <P><STRONG><a name="[24]"></a>TIMER0_TRG_CMT_TIMER10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    252. 

  252. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    253. 

  253. </UL>
    254. 

  254. <P><STRONG><a name="[23]"></a>TIMER0_UP_TIMER9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    255. 

  255. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    256. 

  256. </UL>
    257. 

  257. <P><STRONG><a name="[26]"></a>TIMER1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    258. 

  258. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    259. 

  259. </UL>
    260. 

  260. <P><STRONG><a name="[27]"></a>TIMER2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    261. 

  261. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    262. 

  262. </UL>
    263. 

  263. <P><STRONG><a name="[28]"></a>TIMER3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    264. 

  264. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    265. 

  265. </UL>
    266. 

  266. <P><STRONG><a name="[3c]"></a>TIMER4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    267. 

  267. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    268. 

  268. </UL>
    269. 

  269. <P><STRONG><a name="[40]"></a>TIMER5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    270. 

  270. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    271. 

  271. </UL>
    272. 

  272. <P><STRONG><a name="[41]"></a>TIMER6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    273. 

  273. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    274. 

  274. </UL>
    275. 

  275. <P><STRONG><a name="[35]"></a>TIMER7_BRK_TIMER11_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    276. 

  276. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    277. 

  277. </UL>
    278. 

  278. <P><STRONG><a name="[38]"></a>TIMER7_Channel_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    279. 

  279. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    280. 

  280. </UL>
    281. 

  281. <P><STRONG><a name="[37]"></a>TIMER7_TRG_CMT_TIMER13_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    282. 

  282. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    283. 

  283. </UL>
    284. 

  284. <P><STRONG><a name="[36]"></a>TIMER7_UP_TIMER12_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    285. 

  285. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    286. 

  286. </UL>
    287. 

  287. <P><STRONG><a name="[3e]"></a>UART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    288. 

  288. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    289. 

  289. </UL>
    290. 

  290. <P><STRONG><a name="[3f]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    291. 

  291. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    292. 

  292. </UL>
    293. 

  293. <P><STRONG><a name="[30]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    294. 

  294. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    295. 

  295. </UL>
    296. 

  296. <P><STRONG><a name="[31]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    297. 

  297. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    298. 

  298. </UL>
    299. 

  299. <P><STRONG><a name="[1d]"></a>USBD_HP_CAN0_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    300. 

  300. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    301. 

  301. </UL>
    302. 

  302. <P><STRONG><a name="[1e]"></a>USBD_LP_CAN0_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    303. 

  303. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    304. 

  304. </UL>
    305. 

  305. <P><STRONG><a name="[34]"></a>USBD_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    306. 

  306. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    307. 

  307. </UL>
    308. 

  308. <P><STRONG><a name="[a]"></a>WWDGT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    309. 

  309. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    310. 

  310. </UL>
    311. 

  311. <P><STRONG><a name="[51]"></a>__aeabi_memset</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, memseta.o(.text))
    312. 

  312. <BR><BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_memset$wrapper
    313. 

  313. <LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
    314. 

  314. </UL>
    315. 

  315. 

  316. <P><STRONG><a name="[b7]"></a>__aeabi_memset4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    317. 

  317. 

  318. <P><STRONG><a name="[b8]"></a>__aeabi_memset8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    319. 

  319. 

  320. <P><STRONG><a name="[50]"></a>__aeabi_memclr</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, memseta.o(.text))
    321. 

  321. <BR><BR>[Calls]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
    322. 

  322. </UL>
    323. 

  323. <BR>[Called By]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Clear_DMA_Buffer
    324. 

  324. </UL>
    325. 

  325. 

  326. <P><STRONG><a name="[b9]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    327. 

  327. 

  328. <P><STRONG><a name="[ba]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    329. 

  329. 

  330. <P><STRONG><a name="[52]"></a>_memset$wrapper</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, memseta.o(.text), UNUSED)
    331. 

  331. <BR><BR>[Calls]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
    332. 

  332. </UL>
    333. 

  333. 

  334. <P><STRONG><a name="[82]"></a>strstr</STRONG> (Thumb, 36 bytes, Stack size 12 bytes, strstr.o(.text))
    335. 

  335. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = strstr
    336. 

  336. </UL>
    337. 

  337. <BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_bin_txt
    338. 

  338. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WaitResponse
    339. 

  339. <LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;extract_data_from_buffer
    340. 

  340. </UL>
    341. 

  341. 

  342. <P><STRONG><a name="[8f]"></a>strchr</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, strchr.o(.text))
    343. 

  343. <BR><BR>[Called By]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;extract_data_from_buffer
    344. 

  344. </UL>
    345. 

  345. 

  346. <P><STRONG><a name="[ac]"></a>strlen</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, strlen.o(.text))
    347. 

  347. <BR><BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_bin_txt
    348. 

  348. </UL>
    349. 

  349. 

  350. <P><STRONG><a name="[a9]"></a>memcmp</STRONG> (Thumb, 26 bytes, Stack size 12 bytes, memcmp.o(.text))
    351. 

  351. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = memcmp
    352. 

  352. </UL>
    353. 

  353. <BR>[Called By]<UL><LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_memmem
    354. 

  354. </UL>
    355. 

  355. 

  356. <P><STRONG><a name="[53]"></a>__0sscanf</STRONG> (Thumb, 48 bytes, Stack size 72 bytes, __0sscanf.o(.text))
    357. 

  357. <BR><BR>[Stack]<UL><LI>Max Depth = 216<LI>Call Chain = __0sscanf &rArr; __vfscanf_char &rArr; __vfscanf &rArr; _scanf_int
    358. 

  358. </UL>
    359. 

  359. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__vfscanf_char
    360. 

  360. </UL>
    361. 

  361. <BR>[Called By]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;extract_data_from_buffer
    362. 

  362. </UL>
    363. 

  363. 

  364. <P><STRONG><a name="[55]"></a>_scanf_int</STRONG> (Thumb, 332 bytes, Stack size 56 bytes, _scanf_int.o(.text))
    365. 

  365. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = _scanf_int
    366. 

  366. </UL>
    367. 

  367. <BR>[Calls]<UL><LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_chval
    368. 

  368. </UL>
    369. 

  369. <BR>[Called By]<UL><LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__vfscanf
    370. 

  370. </UL>
    371. 

  371. 

  372. <P><STRONG><a name="[56]"></a>_chval</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, _chval.o(.text))
    373. 

  373. <BR><BR>[Called By]<UL><LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_scanf_int
    374. 

  374. </UL>
    375. 

  375. 

  376. <P><STRONG><a name="[54]"></a>__vfscanf_char</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, scanf_char.o(.text))
    377. 

  377. <BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = __vfscanf_char &rArr; __vfscanf &rArr; _scanf_int
    378. 

  378. </UL>
    379. 

  379. <BR>[Calls]<UL><LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__vfscanf
    380. 

  380. </UL>
    381. 

  381. <BR>[Called By]<UL><LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0sscanf
    382. 

  382. </UL>
    383. 

  383. 

  384. <P><STRONG><a name="[49]"></a>_sgetc</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, _sgetc.o(.text))
    385. 

  385. <BR>[Address Reference Count : 1]<UL><LI> __0sscanf.o(.text)
    386. 

  386. </UL>
    387. 

  387. <P><STRONG><a name="[4a]"></a>_sbackspace</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, _sgetc.o(.text))
    388. 

  388. <BR>[Address Reference Count : 1]<UL><LI> __0sscanf.o(.text)
    389. 

  389. </UL>
    390. 

  390. <P><STRONG><a name="[4f]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
    391. 

  391. <BR><BR>[Calls]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
    392. 

  392. </UL>
    393. 

  393. <BR>[Called By]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
    394. 

  394. </UL>
    395. 

  395. 

  396. <P><STRONG><a name="[bb]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)
    397. 

  397. 

  398. <P><STRONG><a name="[4c]"></a>isspace</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, isspace_c.o(.text))
    399. 

  399. <BR><BR>[Calls]<UL><LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__ctype_lookup
    400. 

  400. </UL>
    401. 

  401. <BR>[Address Reference Count : 1]<UL><LI> scanf_char.o(.text)
    402. 

  402. </UL>
    403. 

  403. <P><STRONG><a name="[57]"></a>__vfscanf</STRONG> (Thumb, 808 bytes, Stack size 88 bytes, _scanf.o(.text))
    404. 

  404. <BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = __vfscanf &rArr; _scanf_int
    405. 

  405. </UL>
    406. 

  406. <BR>[Calls]<UL><LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_scanf_int
    407. 

  407. </UL>
    408. 

  408. <BR>[Called By]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__vfscanf_char
    409. 

  409. </UL>
    410. 

  410. 

  411. <P><STRONG><a name="[59]"></a>__ctype_lookup</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, ctype_c.o(.text))
    412. 

  412. <BR><BR>[Called By]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;isspace
    413. 

  413. </UL>
    414. 

  414. 

  415. <P><STRONG><a name="[5a]"></a>BootLoader_Clear</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, boot.o(i.BootLoader_Clear))
    416. 

  416. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = BootLoader_Clear &rArr; dma_deinit
    417. 

  417. </UL>
    418. 

  418. <BR>[Calls]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_disable
    419. 

  419. <LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_deinit
    420. 

  420. <LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_deinit
    421. 

  421. <LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_disable
    422. 

  422. </UL>
    423. 

  423. <BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LOAD_A
    424. 

  424. </UL>
    425. 

  425. 

  426. <P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_it.o(i.BusFault_Handler))
    427. 

  427. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    428. 

  428. </UL>
    429. 

  429. <P><STRONG><a name="[5f]"></a>Clear_DMA_Buffer</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, ec800.o(i.Clear_DMA_Buffer))
    430. 

  430. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = Clear_DMA_Buffer
    431. 

  431. </UL>
    432. 

  432. <BR>[Calls]<UL><LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
    433. 

  433. </UL>
    434. 

  434. <BR>[Called By]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WaitResponse
    435. 

  435. </UL>
    436. 

  436. 

  437. <P><STRONG><a name="[19]"></a>DMA0_Channel4_IRQHandler</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, ec800.o(i.DMA0_Channel4_IRQHandler))
    438. 

  438. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = DMA0_Channel4_IRQHandler &rArr; dma_interrupt_flag_clear
    439. 

  439. </UL>
    440. 

  440. <BR>[Calls]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_interrupt_flag_clear
    441. 

  441. </UL>
    442. 

  442. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    443. 

  443. </UL>
    444. 

  444. <P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f10x_it.o(i.DebugMon_Handler))
    445. 

  445. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    446. 

  446. </UL>
    447. 

  447. <P><STRONG><a name="[61]"></a>Delay_Init</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, delay.o(i.Delay_Init))
    448. 

  448. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = Delay_Init
    449. 

  449. </UL>
    450. 

  450. <BR>[Calls]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;systick_clksource_set
    451. 

  451. </UL>
    452. 

  452. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    453. 

  453. </UL>
    454. 

  454. 

  455. <P><STRONG><a name="[63]"></a>Delay_Ms</STRONG> (Thumb, 26 bytes, Stack size 4 bytes, delay.o(i.Delay_Ms))
    456. 

  456. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = Delay_Ms
    457. 

  457. </UL>
    458. 

  458. <BR>[Calls]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Us
    459. 

  459. </UL>
    460. 

  460. <BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_bin_txt
    461. 

  461. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WaitResponse
    462. 

  462. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MSetPDP
    463. 

  463. <LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    464. 

  464. <LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_READ_OTA
    465. 

  465. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    466. 

  466. </UL>
    467. 

  467. 

  468. <P><STRONG><a name="[64]"></a>Delay_Us</STRONG> (Thumb, 58 bytes, Stack size 0 bytes, delay.o(i.Delay_Us))
    469. 

  469. <BR><BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Ms
    470. 

  470. </UL>
    471. 

  471. 

  472. <P><STRONG><a name="[65]"></a>EC800MPwoerOn</STRONG> (Thumb, 82 bytes, Stack size 8 bytes, ec800.o(i.EC800MPwoerOn))
    473. 

  473. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = EC800MPwoerOn &rArr; gpio_init
    474. 

  474. </UL>
    475. 

  475. <BR>[Calls]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_pull_EC800M_rst_up
    476. 

  476. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_pull_EC800M_rst_down
    477. 

  477. <LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_pull_EC800M_pwr_up
    478. 

  478. <LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_pull_EC800M_pwr_down
    479. 

  479. <LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_set
    480. 

  480. <LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    481. 

  481. <LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_init
    482. 

  482. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Ms
    483. 

  483. </UL>
    484. 

  484. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    485. 

  485. </UL>
    486. 

  486. 

  487. <P><STRONG><a name="[6d]"></a>EC800MSendCmd</STRONG> (Thumb, 48 bytes, Stack size 24 bytes, ec800.o(i.EC800MSendCmd))
    488. 

  488. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = EC800MSendCmd &rArr; usart_flag_get
    489. 

  489. </UL>
    490. 

  490. <BR>[Calls]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_flag_get
    491. 

  491. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_transmit
    492. 

  492. </UL>
    493. 

  493. <BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_bin_txt
    494. 

  494. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MSetPDP
    495. 

  495. </UL>
    496. 

  496. 

  497. <P><STRONG><a name="[70]"></a>EC800MSetPDP</STRONG> (Thumb, 60 bytes, Stack size 8 bytes, ec800.o(i.EC800MSetPDP))
    498. 

  498. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = EC800MSetPDP &rArr; WaitResponse &rArr; strstr
    499. 

  499. </UL>
    500. 

  500. <BR>[Calls]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WaitResponse
    501. 

  501. <LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MSendCmd
    502. 

  502. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Ms
    503. 

  503. </UL>
    504. 

  504. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    505. 

  505. </UL>
    506. 

  506. 

  507. <P><STRONG><a name="[72]"></a>EC800MWaitReady</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, ec800.o(i.EC800MWaitReady))
    508. 

  508. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = EC800MWaitReady &rArr; WaitResponse &rArr; strstr
    509. 

  509. </UL>
    510. 

  510. <BR>[Calls]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WaitResponse
    511. 

  511. </UL>
    512. 

  512. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    513. 

  513. </UL>
    514. 

  514. 

  515. <P><STRONG><a name="[73]"></a>GD32_EraseFlash</STRONG> (Thumb, 48 bytes, Stack size 16 bytes, fmc.o(i.GD32_EraseFlash))
    516. 

  516. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = GD32_EraseFlash &rArr; fmc_page_erase &rArr; fmc_bank1_ready_wait
    517. 

  517. </UL>
    518. 

  518. <BR>[Calls]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_unlock
    519. 

  519. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_page_erase
    520. 

  520. <LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_lock
    521. 

  521. </UL>
    522. 

  522. <BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_bin_txt
    523. 

  523. <LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;write_soft_version
    524. 

  524. </UL>
    525. 

  525. 

  526. <P><STRONG><a name="[77]"></a>GD32_READ_OTA</STRONG> (Thumb, 18 bytes, Stack size 16 bytes, gd_ota_flash.o(i.GD32_READ_OTA))
    527. 

  527. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = GD32_READ_OTA &rArr; Delay_Ms
    528. 

  528. </UL>
    529. 

  529. <BR>[Calls]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Ms
    530. 

  530. </UL>
    531. 

  531. <BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;soft_init
    532. 

  532. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    533. 

  533. </UL>
    534. 

  534. 

  535. <P><STRONG><a name="[78]"></a>GD32_WriteFlash</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, fmc.o(i.GD32_WriteFlash))
    536. 

  536. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = GD32_WriteFlash &rArr; fmc_word_program &rArr; fmc_bank1_ready_wait
    537. 

  537. </UL>
    538. 

  538. <BR>[Calls]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_word_program
    539. 

  539. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_unlock
    540. 

  540. <LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_lock
    541. 

  541. </UL>
    542. 

  542. <BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_bin_txt
    543. 

  543. <LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;write_soft_version
    544. 

  544. </UL>
    545. 

  545. 

  546. <P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_it.o(i.HardFault_Handler))
    547. 

  547. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    548. 

  548. </UL>
    549. 

  549. <P><STRONG><a name="[7a]"></a>LOAD_A</STRONG> (Thumb, 44 bytes, Stack size 8 bytes, boot.o(i.LOAD_A))
    550. 

  550. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = LOAD_A &rArr; BootLoader_Clear &rArr; dma_deinit
    551. 

  551. </UL>
    552. 

  552. <BR>[Calls]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Clear
    553. 

  553. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MSR_SP
    554. 

  554. </UL>
    555. 

  555. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    556. 

  556. </UL>
    557. 

  557. 

  558. <P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_it.o(i.MemManage_Handler))
    559. 

  559. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    560. 

  560. </UL>
    561. 

  561. <P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f10x_it.o(i.NMI_Handler))
    562. 

  562. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    563. 

  563. </UL>
    564. 

  564. <P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f10x_it.o(i.PendSV_Handler))
    565. 

  565. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    566. 

  566. </UL>
    567. 

  567. <P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f10x_it.o(i.SVC_Handler))
    568. 

  568. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    569. 

  569. </UL>
    570. 

  570. <P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f10x_it.o(i.SysTick_Handler))
    571. 

  571. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    572. 

  572. </UL>
    573. 

  573. <P><STRONG><a name="[47]"></a>SystemInit</STRONG> (Thumb, 196 bytes, Stack size 8 bytes, system_gd32f10x.o(i.SystemInit))
    574. 

  574. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SystemInit &rArr; system_clock_config
    575. 

  575. </UL>
    576. 

  576. <BR>[Calls]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_vector_table_set
    577. 

  577. <LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_config
    578. 

  578. </UL>
    579. 

  579. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(.text)
    580. 

  580. </UL>
    581. 

  581. <P><STRONG><a name="[2f]"></a>USART0_IRQHandler</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, ec800.o(i.USART0_IRQHandler))
    582. 

  582. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = USART0_IRQHandler &rArr; usart_interrupt_flag_get
    583. 

  583. </UL>
    584. 

  584. <BR>[Calls]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_flag_get
    585. 

  585. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_flag_clear
    586. 

  586. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_receive
    587. 

  587. <LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_enable
    588. 

  588. <LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_disable
    589. 

  589. </UL>
    590. 

  590. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    591. 

  591. </UL>
    592. 

  592. <P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_it.o(i.UsageFault_Handler))
    593. 

  593. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    594. 

  594. </UL>
    595. 

  595. <P><STRONG><a name="[71]"></a>WaitResponse</STRONG> (Thumb, 82 bytes, Stack size 24 bytes, ec800.o(i.WaitResponse))
    596. 

  596. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = WaitResponse &rArr; strstr
    597. 

  597. </UL>
    598. 

  598. <BR>[Calls]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Clear_DMA_Buffer
    599. 

  599. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Ms
    600. 

  600. <LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strstr
    601. 

  601. </UL>
    602. 

  602. <BR>[Called By]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MWaitReady
    603. 

  603. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MSetPDP
    604. 

  604. </UL>
    605. 

  605. 

  606. <P><STRONG><a name="[83]"></a>__0sprintf$2</STRONG> (Thumb, 34 bytes, Stack size 24 bytes, printf2.o(i.__0sprintf$2), UNUSED)
    607. 

  607. <BR><BR>[Calls]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sputc
    608. 

  608. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
    609. 

  609. </UL>
    610. 

  610. 

  611. <P><STRONG><a name="[bc]"></a>__1sprintf$2</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printf2.o(i.__0sprintf$2), UNUSED)
    612. 

  612. 

  613. <P><STRONG><a name="[ab]"></a>__2sprintf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printf2.o(i.__0sprintf$2))
    614. 

  614. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = __2sprintf
    615. 

  615. </UL>
    616. 

  616. <BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_bin_txt
    617. 

  617. </UL>
    618. 

  618. 

  619. <P><STRONG><a name="[bd]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)
    620. 

  620. 

  621. <P><STRONG><a name="[be]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)
    622. 

  622. 

  623. <P><STRONG><a name="[bf]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)
    624. 

  624. 

  625. <P><STRONG><a name="[5c]"></a>dma_channel_disable</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, gd32f10x_dma.o(i.dma_channel_disable))
    626. 

  626. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = dma_channel_disable
    627. 

  627. </UL>
    628. 

  628. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_periph_and_channel_check
    629. 

  629. </UL>
    630. 

  630. <BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART0_IRQHandler
    631. 

  631. <LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Clear
    632. 

  632. </UL>
    633. 

  633. 

  634. <P><STRONG><a name="[81]"></a>dma_channel_enable</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, gd32f10x_dma.o(i.dma_channel_enable))
    635. 

  635. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = dma_channel_enable
    636. 

  636. </UL>
    637. 

  637. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_periph_and_channel_check
    638. 

  638. </UL>
    639. 

  639. <BR>[Called By]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    640. 

  640. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    641. 

  641. <LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART0_IRQHandler
    642. 

  642. </UL>
    643. 

  643. 

  644. <P><STRONG><a name="[86]"></a>dma_circulation_disable</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, gd32f10x_dma.o(i.dma_circulation_disable))
    645. 

  645. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = dma_circulation_disable
    646. 

  646. </UL>
    647. 

  647. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_periph_and_channel_check
    648. 

  648. </UL>
    649. 

  649. <BR>[Called By]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    650. 

  650. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    651. 

  651. </UL>
    652. 

  652. 

  653. <P><STRONG><a name="[87]"></a>dma_config</STRONG> (Thumb, 132 bytes, Stack size 32 bytes, ec800.o(i.dma_config))
    654. 

  654. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = dma_config &rArr; nvic_irq_enable
    655. 

  655. </UL>
    656. 

  656. <BR>[Calls]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_dma_transmit_config
    657. 

  657. <LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
    658. 

  658. <LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_memory_to_memory_disable
    659. 

  659. <LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_interrupt_enable
    660. 

  660. <LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_init
    661. 

  661. <LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_circulation_disable
    662. 

  662. <LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_enable
    663. 

  663. <LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    664. 

  664. <LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_deinit
    665. 

  665. </UL>
    666. 

  666. <BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_bin_txt
    667. 

  667. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    668. 

  668. </UL>
    669. 

  669. 

  670. <P><STRONG><a name="[8d]"></a>dma_config_change</STRONG> (Thumb, 120 bytes, Stack size 40 bytes, ec800.o(i.dma_config_change))
    671. 

  671. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = dma_config_change &rArr; dma_init
    672. 

  672. </UL>
    673. 

  673. <BR>[Calls]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_dma_transmit_config
    674. 

  674. <LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_memory_to_memory_disable
    675. 

  675. <LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_interrupt_enable
    676. 

  676. <LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_init
    677. 

  677. <LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_circulation_disable
    678. 

  678. <LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_enable
    679. 

  679. <LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    680. 

  680. <LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_deinit
    681. 

  681. </UL>
    682. 

  682. <BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_bin_txt
    683. 

  683. </UL>
    684. 

  684. 

  685. <P><STRONG><a name="[5d]"></a>dma_deinit</STRONG> (Thumb, 112 bytes, Stack size 16 bytes, gd32f10x_dma.o(i.dma_deinit))
    686. 

  686. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = dma_deinit
    687. 

  687. </UL>
    688. 

  688. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_periph_and_channel_check
    689. 

  689. </UL>
    690. 

  690. <BR>[Called By]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    691. 

  691. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    692. 

  692. <LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Clear
    693. 

  693. </UL>
    694. 

  694. 

  695. <P><STRONG><a name="[88]"></a>dma_init</STRONG> (Thumb, 302 bytes, Stack size 24 bytes, gd32f10x_dma.o(i.dma_init))
    696. 

  696. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = dma_init
    697. 

  697. </UL>
    698. 

  698. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_periph_and_channel_check
    699. 

  699. </UL>
    700. 

  700. <BR>[Called By]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    701. 

  701. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    702. 

  702. </UL>
    703. 

  703. 

  704. <P><STRONG><a name="[8c]"></a>dma_interrupt_enable</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, gd32f10x_dma.o(i.dma_interrupt_enable))
    705. 

  705. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = dma_interrupt_enable
    706. 

  706. </UL>
    707. 

  707. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_periph_and_channel_check
    708. 

  708. </UL>
    709. 

  709. <BR>[Called By]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    710. 

  710. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    711. 

  711. </UL>
    712. 

  712. 

  713. <P><STRONG><a name="[60]"></a>dma_interrupt_flag_clear</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, gd32f10x_dma.o(i.dma_interrupt_flag_clear))
    714. 

  714. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = dma_interrupt_flag_clear
    715. 

  715. </UL>
    716. 

  716. <BR>[Called By]<UL><LI><a href="#[19]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA0_Channel4_IRQHandler
    717. 

  717. </UL>
    718. 

  718. 

  719. <P><STRONG><a name="[89]"></a>dma_memory_to_memory_disable</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, gd32f10x_dma.o(i.dma_memory_to_memory_disable))
    720. 

  720. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = dma_memory_to_memory_disable
    721. 

  721. </UL>
    722. 

  722. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_periph_and_channel_check
    723. 

  723. </UL>
    724. 

  724. <BR>[Called By]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    725. 

  725. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    726. 

  726. </UL>
    727. 

  727. 

  728. <P><STRONG><a name="[90]"></a>fmc_bank0_ready_wait</STRONG> (Thumb, 34 bytes, Stack size 4 bytes, gd32f10x_fmc.o(i.fmc_bank0_ready_wait))
    729. 

  729. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = fmc_bank0_ready_wait
    730. 

  730. </UL>
    731. 

  731. <BR>[Calls]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_state_get
    732. 

  732. </UL>
    733. 

  733. <BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_word_program
    734. 

  734. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_page_erase
    735. 

  735. </UL>
    736. 

  736. 

  737. <P><STRONG><a name="[91]"></a>fmc_bank0_state_get</STRONG> (Thumb, 44 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_bank0_state_get))
    738. 

  738. <BR><BR>[Called By]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_ready_wait
    739. 

  739. </UL>
    740. 

  740. 

  741. <P><STRONG><a name="[92]"></a>fmc_bank1_ready_wait</STRONG> (Thumb, 34 bytes, Stack size 4 bytes, gd32f10x_fmc.o(i.fmc_bank1_ready_wait))
    742. 

  742. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = fmc_bank1_ready_wait
    743. 

  743. </UL>
    744. 

  744. <BR>[Calls]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_state_get
    745. 

  745. </UL>
    746. 

  746. <BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_word_program
    747. 

  747. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_page_erase
    748. 

  748. </UL>
    749. 

  749. 

  750. <P><STRONG><a name="[93]"></a>fmc_bank1_state_get</STRONG> (Thumb, 44 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_bank1_state_get))
    751. 

  751. <BR><BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_ready_wait
    752. 

  752. </UL>
    753. 

  753. 

  754. <P><STRONG><a name="[76]"></a>fmc_lock</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_lock))
    755. 

  755. <BR><BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_WriteFlash
    756. 

  756. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_EraseFlash
    757. 

  757. </UL>
    758. 

  758. 

  759. <P><STRONG><a name="[75]"></a>fmc_page_erase</STRONG> (Thumb, 222 bytes, Stack size 12 bytes, gd32f10x_fmc.o(i.fmc_page_erase))
    760. 

  760. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = fmc_page_erase &rArr; fmc_bank1_ready_wait
    761. 

  761. </UL>
    762. 

  762. <BR>[Calls]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_ready_wait
    763. 

  763. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_ready_wait
    764. 

  764. </UL>
    765. 

  765. <BR>[Called By]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_EraseFlash
    766. 

  766. </UL>
    767. 

  767. 

  768. <P><STRONG><a name="[74]"></a>fmc_unlock</STRONG> (Thumb, 52 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_unlock))
    769. 

  769. <BR><BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_WriteFlash
    770. 

  770. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_EraseFlash
    771. 

  771. </UL>
    772. 

  772. 

  773. <P><STRONG><a name="[79]"></a>fmc_word_program</STRONG> (Thumb, 178 bytes, Stack size 16 bytes, gd32f10x_fmc.o(i.fmc_word_program))
    774. 

  774. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = fmc_word_program &rArr; fmc_bank1_ready_wait
    775. 

  775. </UL>
    776. 

  776. <BR>[Calls]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_ready_wait
    777. 

  777. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_ready_wait
    778. 

  778. </UL>
    779. 

  779. <BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_WriteFlash
    780. 

  780. </UL>
    781. 

  781. 

  782. <P><STRONG><a name="[ad]"></a>free</STRONG> (Thumb, 76 bytes, Stack size 8 bytes, malloc.o(i.free))
    783. 

  783. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = free
    784. 

  784. </UL>
    785. 

  785. <BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_bin_txt
    786. 

  786. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;soft_init
    787. 

  787. </UL>
    788. 

  788. 

  789. <P><STRONG><a name="[94]"></a>gd_EC800M_pin_init</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, ec800.o(i.gd_EC800M_pin_init))
    790. 

  790. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = gd_EC800M_pin_init &rArr; gpio_init
    791. 

  791. </UL>
    792. 

  792. <BR>[Calls]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    793. 

  793. <LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_init
    794. 

  794. </UL>
    795. 

  795. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    796. 

  796. </UL>
    797. 

  797. 

  798. <P><STRONG><a name="[95]"></a>gd_com_init</STRONG> (Thumb, 154 bytes, Stack size 8 bytes, ec800.o(i.gd_com_init))
    799. 

  799. <BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = gd_com_init &rArr; usart_baudrate_set &rArr; rcu_clock_freq_get
    800. 

  800. </UL>
    801. 

  801. <BR>[Calls]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_word_length_set
    802. 

  802. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_transmit_config
    803. 

  803. <LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_stop_bit_set
    804. 

  804. <LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_receive_config
    805. 

  805. <LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_parity_config
    806. 

  806. <LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_enable
    807. 

  807. <LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_hardware_flow_rts_config
    808. 

  808. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_hardware_flow_cts_config
    809. 

  809. <LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_enable
    810. 

  810. <LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
    811. 

  811. <LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_baudrate_set
    812. 

  812. <LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_priority_group_set
    813. 

  813. <LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
    814. 

  814. <LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    815. 

  815. <LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_init
    816. 

  816. </UL>
    817. 

  817. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    818. 

  818. </UL>
    819. 

  819. 

  820. <P><STRONG><a name="[6b]"></a>gd_pull_EC800M_pwr_down</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, ec800.o(i.gd_pull_EC800M_pwr_down))
    821. 

  821. <BR><BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    822. 

  822. </UL>
    823. 

  823. 

  824. <P><STRONG><a name="[69]"></a>gd_pull_EC800M_pwr_up</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, ec800.o(i.gd_pull_EC800M_pwr_up))
    825. 

  825. <BR><BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    826. 

  826. </UL>
    827. 

  827. 

  828. <P><STRONG><a name="[6a]"></a>gd_pull_EC800M_rst_down</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, ec800.o(i.gd_pull_EC800M_rst_down))
    829. 

  829. <BR><BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    830. 

  830. </UL>
    831. 

  831. 

  832. <P><STRONG><a name="[6c]"></a>gd_pull_EC800M_rst_up</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, ec800.o(i.gd_pull_EC800M_rst_up))
    833. 

  833. <BR><BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    834. 

  834. </UL>
    835. 

  835. 

  836. <P><STRONG><a name="[68]"></a>gpio_bit_set</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_gpio.o(i.gpio_bit_set))
    837. 

  837. <BR><BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    838. 

  838. </UL>
    839. 

  839. 

  840. <P><STRONG><a name="[5e]"></a>gpio_deinit</STRONG> (Thumb, 186 bytes, Stack size 8 bytes, gd32f10x_gpio.o(i.gpio_deinit))
    841. 

  841. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = gpio_deinit
    842. 

  842. </UL>
    843. 

  843. <BR>[Calls]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_enable
    844. 

  844. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_disable
    845. 

  845. </UL>
    846. 

  846. <BR>[Called By]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Clear
    847. 

  847. </UL>
    848. 

  848. 

  849. <P><STRONG><a name="[67]"></a>gpio_init</STRONG> (Thumb, 172 bytes, Stack size 20 bytes, gd32f10x_gpio.o(i.gpio_init))
    850. 

  850. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = gpio_init
    851. 

  851. </UL>
    852. 

  852. <BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    853. 

  853. <LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_EC800M_pin_init
    854. 

  854. <LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    855. 

  855. </UL>
    856. 

  856. 

  857. <P><STRONG><a name="[46]"></a>main</STRONG> (Thumb, 124 bytes, Stack size 8 bytes, main.o(i.main))
    858. 

  858. <BR><BR>[Stack]<UL><LI>Max Depth = 352<LI>Call Chain = main &rArr; read_bin_txt &rArr; extract_data_from_buffer &rArr; __0sscanf &rArr; __vfscanf_char &rArr; __vfscanf &rArr; _scanf_int
    859. 

  859. </UL>
    860. 

  860. <BR>[Calls]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_bin_txt
    861. 

  861. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    862. 

  862. <LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_EC800M_pin_init
    863. 

  863. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    864. 

  864. <LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MWaitReady
    865. 

  865. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MSetPDP
    866. 

  866. <LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    867. 

  867. <LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;write_soft_version
    868. 

  868. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;soft_init
    869. 

  869. <LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_READ_OTA
    870. 

  870. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Ms
    871. 

  871. <LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Init
    872. 

  872. <LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LOAD_A
    873. 

  873. <LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_SystemReset
    874. 

  874. </UL>
    875. 

  875. <BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
    876. 

  876. </UL>
    877. 

  877. <P><STRONG><a name="[aa]"></a>malloc</STRONG> (Thumb, 92 bytes, Stack size 20 bytes, malloc.o(i.malloc))
    878. 

  878. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = malloc
    879. 

  879. </UL>
    880. 

  880. <BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_bin_txt
    881. 

  881. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;soft_init
    882. 

  882. </UL>
    883. 

  883. 

  884. <P><STRONG><a name="[8b]"></a>nvic_irq_enable</STRONG> (Thumb, 162 bytes, Stack size 24 bytes, gd32f10x_misc.o(i.nvic_irq_enable))
    885. 

  885. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = nvic_irq_enable
    886. 

  886. </UL>
    887. 

  887. <BR>[Calls]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_priority_group_set
    888. 

  888. </UL>
    889. 

  889. <BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    890. 

  890. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    891. 

  891. </UL>
    892. 

  892. 

  893. <P><STRONG><a name="[96]"></a>nvic_priority_group_set</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_misc.o(i.nvic_priority_group_set))
    894. 

  894. <BR><BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
    895. 

  895. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    896. 

  896. </UL>
    897. 

  897. 

  898. <P><STRONG><a name="[7d]"></a>nvic_vector_table_set</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_misc.o(i.nvic_vector_table_set))
    899. 

  899. <BR><BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
    900. 

  900. </UL>
    901. 

  901. 

  902. <P><STRONG><a name="[b0]"></a>rcu_clock_freq_get</STRONG> (Thumb, 264 bytes, Stack size 80 bytes, gd32f10x_rcu.o(i.rcu_clock_freq_get))
    903. 

  903. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = rcu_clock_freq_get
    904. 

  904. </UL>
    905. 

  905. <BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_baudrate_set
    906. 

  906. </UL>
    907. 

  907. 

  908. <P><STRONG><a name="[66]"></a>rcu_periph_clock_enable</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_rcu.o(i.rcu_periph_clock_enable))
    909. 

  909. <BR><BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    910. 

  910. <LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_EC800M_pin_init
    911. 

  911. <LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    912. 

  912. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    913. 

  913. <LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    914. 

  914. </UL>
    915. 

  915. 

  916. <P><STRONG><a name="[a3]"></a>rcu_periph_reset_disable</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_rcu.o(i.rcu_periph_reset_disable))
    917. 

  917. <BR><BR>[Called By]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
    918. 

  918. <LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_deinit
    919. 

  919. </UL>
    920. 

  920. 

  921. <P><STRONG><a name="[a2]"></a>rcu_periph_reset_enable</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_rcu.o(i.rcu_periph_reset_enable))
    922. 

  922. <BR><BR>[Called By]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
    923. 

  923. <LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_deinit
    924. 

  924. </UL>
    925. 

  925. 

  926. <P><STRONG><a name="[a5]"></a>read_bin_txt</STRONG> (Thumb, 212 bytes, Stack size 96 bytes, ec800.o(i.read_bin_txt))
    927. 

  927. <BR><BR>[Stack]<UL><LI>Max Depth = 344<LI>Call Chain = read_bin_txt &rArr; extract_data_from_buffer &rArr; __0sscanf &rArr; __vfscanf_char &rArr; __vfscanf &rArr; _scanf_int
    928. 

  928. </UL>
    929. 

  929. <BR>[Calls]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    930. 

  930. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    931. 

  931. <LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MSendCmd
    932. 

  932. <LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_memmem
    933. 

  933. <LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;extract_data_from_buffer
    934. 

  934. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;checksum
    935. 

  935. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Ms
    936. 

  936. <LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_WriteFlash
    937. 

  937. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_EraseFlash
    938. 

  938. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2sprintf
    939. 

  939. <LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strlen
    940. 

  940. <LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strstr
    941. 

  941. <LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
    942. 

  942. <LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
    943. 

  943. </UL>
    944. 

  944. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    945. 

  945. </UL>
    946. 

  946. 

  947. <P><STRONG><a name="[a4]"></a>soft_init</STRONG> (Thumb, 60 bytes, Stack size 8 bytes, gd_ota_flash.o(i.soft_init))
    948. 

  948. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = soft_init &rArr; write_soft_version &rArr; GD32_WriteFlash &rArr; fmc_word_program &rArr; fmc_bank1_ready_wait
    949. 

  949. </UL>
    950. 

  950. <BR>[Calls]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;write_soft_version
    951. 

  951. <LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_READ_OTA
    952. 

  952. <LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
    953. 

  953. <LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
    954. 

  954. </UL>
    955. 

  955. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    956. 

  956. </UL>
    957. 

  957. 

  958. <P><STRONG><a name="[62]"></a>systick_clksource_set</STRONG> (Thumb, 40 bytes, Stack size 0 bytes, gd32f10x_misc.o(i.systick_clksource_set))
    959. 

  959. <BR><BR>[Called By]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Init
    960. 

  960. </UL>
    961. 

  961. 

  962. <P><STRONG><a name="[98]"></a>usart_baudrate_set</STRONG> (Thumb, 136 bytes, Stack size 32 bytes, gd32f10x_usart.o(i.usart_baudrate_set))
    963. 

  963. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = usart_baudrate_set &rArr; rcu_clock_freq_get
    964. 

  964. </UL>
    965. 

  965. <BR>[Calls]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_clock_freq_get
    966. 

  966. </UL>
    967. 

  967. <BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    968. 

  968. </UL>
    969. 

  969. 

  970. <P><STRONG><a name="[80]"></a>usart_data_receive</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_data_receive))
    971. 

  971. <BR><BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART0_IRQHandler
    972. 

  972. </UL>
    973. 

  973. 

  974. <P><STRONG><a name="[6e]"></a>usart_data_transmit</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_data_transmit))
    975. 

  975. <BR><BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MSendCmd
    976. 

  976. </UL>
    977. 

  977. 

  978. <P><STRONG><a name="[97]"></a>usart_deinit</STRONG> (Thumb, 136 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_deinit))
    979. 

  979. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_deinit
    980. 

  980. </UL>
    981. 

  981. <BR>[Calls]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_enable
    982. 

  982. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_disable
    983. 

  983. </UL>
    984. 

  984. <BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    985. 

  985. </UL>
    986. 

  986. 

  987. <P><STRONG><a name="[5b]"></a>usart_disable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_disable))
    988. 

  988. <BR><BR>[Called By]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Clear
    989. 

  989. </UL>
    990. 

  990. 

  991. <P><STRONG><a name="[8a]"></a>usart_dma_transmit_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_dma_transmit_config))
    992. 

  992. <BR><BR>[Called By]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    993. 

  993. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    994. 

  994. </UL>
    995. 

  995. 

  996. <P><STRONG><a name="[a0]"></a>usart_enable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_enable))
    997. 

  997. <BR><BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    998. 

  998. </UL>
    999. 

  999. 

  1000. <P><STRONG><a name="[6f]"></a>usart_flag_get</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_flag_get))
    1001. 

  1001. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_flag_get
    1002. 

  1002. </UL>
    1003. 

  1003. <BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MSendCmd
    1004. 

  1004. </UL>
    1005. 

  1005. 

  1006. <P><STRONG><a name="[9d]"></a>usart_hardware_flow_cts_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_hardware_flow_cts_config))
    1007. 

  1007. <BR><BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1008. 

  1008. </UL>
    1009. 

  1009. 

  1010. <P><STRONG><a name="[9c]"></a>usart_hardware_flow_rts_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_hardware_flow_rts_config))
    1011. 

  1011. <BR><BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1012. 

  1012. </UL>
    1013. 

  1013. 

  1014. <P><STRONG><a name="[a1]"></a>usart_interrupt_enable</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_interrupt_enable))
    1015. 

  1015. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_interrupt_enable
    1016. 

  1016. </UL>
    1017. 

  1017. <BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1018. 

  1018. </UL>
    1019. 

  1019. 

  1020. <P><STRONG><a name="[7f]"></a>usart_interrupt_flag_clear</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_interrupt_flag_clear))
    1021. 

  1021. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_interrupt_flag_clear
    1022. 

  1022. </UL>
    1023. 

  1023. <BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART0_IRQHandler
    1024. 

  1024. </UL>
    1025. 

  1025. 

  1026. <P><STRONG><a name="[7e]"></a>usart_interrupt_flag_get</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, gd32f10x_usart.o(i.usart_interrupt_flag_get))
    1027. 

  1027. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = usart_interrupt_flag_get
    1028. 

  1028. </UL>
    1029. 

  1029. <BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART0_IRQHandler
    1030. 

  1030. </UL>
    1031. 

  1031. 

  1032. <P><STRONG><a name="[9b]"></a>usart_parity_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_parity_config))
    1033. 

  1033. <BR><BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1034. 

  1034. </UL>
    1035. 

  1035. 

  1036. <P><STRONG><a name="[9e]"></a>usart_receive_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_receive_config))
    1037. 

  1037. <BR><BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1038. 

  1038. </UL>
    1039. 

  1039. 

  1040. <P><STRONG><a name="[9a]"></a>usart_stop_bit_set</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_stop_bit_set))
    1041. 

  1041. <BR><BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1042. 

  1042. </UL>
    1043. 

  1043. 

  1044. <P><STRONG><a name="[9f]"></a>usart_transmit_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_transmit_config))
    1045. 

  1045. <BR><BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1046. 

  1046. </UL>
    1047. 

  1047. 

  1048. <P><STRONG><a name="[99]"></a>usart_word_length_set</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_word_length_set))
    1049. 

  1049. <BR><BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1050. 

  1050. </UL>
    1051. 

  1051. 

  1052. <P><STRONG><a name="[a6]"></a>write_soft_version</STRONG> (Thumb, 28 bytes, Stack size 16 bytes, gd_ota_flash.o(i.write_soft_version))
    1053. 

  1053. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = write_soft_version &rArr; GD32_WriteFlash &rArr; fmc_word_program &rArr; fmc_bank1_ready_wait
    1054. 

  1054. </UL>
    1055. 

  1055. <BR>[Calls]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_WriteFlash
    1056. 

  1056. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_EraseFlash
    1057. 

  1057. </UL>
    1058. 

  1058. <BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;soft_init
    1059. 

  1059. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1060. 

  1060. </UL>
    1061. 

  1061. <P>
    1062. 

  1062. <H3>
    1063. 

  1063. Local Symbols
    1064. 

  1064. </H3>
    1065. 

  1065. <P><STRONG><a name="[af]"></a>system_clock_108m_hxtal</STRONG> (Thumb, 182 bytes, Stack size 0 bytes, system_gd32f10x.o(i.system_clock_108m_hxtal))
    1066. 

  1066. <BR><BR>[Called By]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_config
    1067. 

  1067. </UL>
    1068. 

  1068. 

  1069. <P><STRONG><a name="[7c]"></a>system_clock_config</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, system_gd32f10x.o(i.system_clock_config))
    1070. 

  1070. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = system_clock_config
    1071. 

  1071. </UL>
    1072. 

  1072. <BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_108m_hxtal
    1073. 

  1073. </UL>
    1074. 

  1074. <BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
    1075. 

  1075. </UL>
    1076. 

  1076. 

  1077. <P><STRONG><a name="[ae]"></a>checksum</STRONG> (Thumb, 66 bytes, Stack size 16 bytes, ec800.o(i.checksum))
    1078. 

  1078. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = checksum
    1079. 

  1079. </UL>
    1080. 

  1080. <BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_bin_txt
    1081. 

  1081. </UL>
    1082. 

  1082. 

  1083. <P><STRONG><a name="[8e]"></a>extract_data_from_buffer</STRONG> (Thumb, 78 bytes, Stack size 32 bytes, ec800.o(i.extract_data_from_buffer))
    1084. 

  1084. <BR><BR>[Stack]<UL><LI>Max Depth = 248<LI>Call Chain = extract_data_from_buffer &rArr; __0sscanf &rArr; __vfscanf_char &rArr; __vfscanf &rArr; _scanf_int
    1085. 

  1085. </UL>
    1086. 

  1086. <BR>[Calls]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strchr
    1087. 

  1087. <LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strstr
    1088. 

  1088. <LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0sscanf
    1089. 

  1089. </UL>
    1090. 

  1090. <BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_bin_txt
    1091. 

  1091. </UL>
    1092. 

  1092. 

  1093. <P><STRONG><a name="[a8]"></a>my_memmem</STRONG> (Thumb, 60 bytes, Stack size 32 bytes, ec800.o(i.my_memmem))
    1094. 

  1094. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = my_memmem &rArr; memcmp
    1095. 

  1095. </UL>
    1096. 

  1096. <BR>[Calls]<UL><LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;memcmp
    1097. 

  1097. </UL>
    1098. 

  1098. <BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_bin_txt
    1099. 

  1099. </UL>
    1100. 

  1100. 

  1101. <P><STRONG><a name="[85]"></a>dma_periph_and_channel_check</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, gd32f10x_dma.o(i.dma_periph_and_channel_check))
    1102. 

  1102. <BR><BR>[Called By]<UL><LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_memory_to_memory_disable
    1103. 

  1103. <LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_interrupt_enable
    1104. 

  1104. <LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_init
    1105. 

  1105. <LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_circulation_disable
    1106. 

  1106. <LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_enable
    1107. 

  1107. <LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_deinit
    1108. 

  1108. <LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_disable
    1109. 

  1109. </UL>
    1110. 

  1110. 

  1111. <P><STRONG><a name="[a7]"></a>NVIC_SystemReset</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, main.o(i.NVIC_SystemReset))
    1112. 

  1112. <BR><BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1113. 

  1113. </UL>
    1114. 

  1114. 

  1115. <P><STRONG><a name="[84]"></a>_printf_core</STRONG> (Thumb, 214 bytes, Stack size 40 bytes, printf2.o(i._printf_core), UNUSED)
    1116. 

  1116. <BR><BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0sprintf$2
    1117. 

  1117. </UL>
    1118. 

  1118. 

  1119. <P><STRONG><a name="[4d]"></a>_sputc</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, printf2.o(i._sputc))
    1120. 

  1120. <BR><BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0sprintf$2
    1121. 

  1121. </UL>
    1122. 

  1122. <BR>[Address Reference Count : 1]<UL><LI> printf2.o(i.__0sprintf$2)
    1123. 

  1123. </UL>
    1124. 

  1124. <P><STRONG><a name="[4b]"></a>_scanf_char_input</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, scanf_char.o(.text))
    1125. 

  1125. <BR>[Address Reference Count : 1]<UL><LI> scanf_char.o(.text)
    1126. 

  1126. </UL><P>
    1127. 

  1127. <H3>
    1128. 

  1128. Undefined Global Symbols
    1129. 

  1129. </H3><HR></body></html>
    1130.