gd32f10x_rtc.c 8.0 KB

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  1. /*!
  2. \file gd32f10x_rtc.c
  3. \brief RTC driver
  4. \version 2014-12-26, V1.0.0, firmware for GD32F10x
  5. \version 2017-06-20, V2.0.0, firmware for GD32F10x
  6. \version 2018-07-31, V2.1.0, firmware for GD32F10x
  7. \version 2020-09-30, V2.2.0, firmware for GD32F10x
  8. */
  9. /*
  10. Copyright (c) 2020, GigaDevice Semiconductor Inc.
  11. Redistribution and use in source and binary forms, with or without modification,
  12. are permitted provided that the following conditions are met:
  13. 1. Redistributions of source code must retain the above copyright notice, this
  14. list of conditions and the following disclaimer.
  15. 2. Redistributions in binary form must reproduce the above copyright notice,
  16. this list of conditions and the following disclaimer in the documentation
  17. and/or other materials provided with the distribution.
  18. 3. Neither the name of the copyright holder nor the names of its contributors
  19. may be used to endorse or promote products derived from this software without
  20. specific prior written permission.
  21. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  23. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  24. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  25. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  26. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  27. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  28. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  30. OF SUCH DAMAGE.
  31. */
  32. #include "gd32f10x_rtc.h"
  33. /* RTC register high / low bits mask */
  34. #define RTC_HIGH_BITS_MASK ((uint32_t)0x000F0000U) /* RTC high bits mask */
  35. #define RTC_LOW_BITS_MASK ((uint32_t)0x0000FFFFU) /* RTC low bits mask */
  36. /* RTC register high bits offset */
  37. #define RTC_HIGH_BITS_OFFSET ((uint32_t)16U)
  38. /*!
  39. \brief enter RTC configuration mode
  40. \param[in] none
  41. \param[out] none
  42. \retval none
  43. */
  44. void rtc_configuration_mode_enter(void)
  45. {
  46. RTC_CTL |= RTC_CTL_CMF;
  47. }
  48. /*!
  49. \brief exit RTC configuration mode
  50. \param[in] none
  51. \param[out] none
  52. \retval none
  53. */
  54. void rtc_configuration_mode_exit(void)
  55. {
  56. RTC_CTL &= ~RTC_CTL_CMF;
  57. }
  58. /*!
  59. \brief set RTC counter value
  60. \param[in] cnt: RTC counter value
  61. \param[out] none
  62. \retval none
  63. */
  64. void rtc_counter_set(uint32_t cnt)
  65. {
  66. rtc_configuration_mode_enter();
  67. /* set the RTC counter high bits */
  68. RTC_CNTH = (cnt >> RTC_HIGH_BITS_OFFSET);
  69. /* set the RTC counter low bits */
  70. RTC_CNTL = (cnt & RTC_LOW_BITS_MASK);
  71. rtc_configuration_mode_exit();
  72. }
  73. /*!
  74. \brief set RTC prescaler value
  75. \param[in] psc: RTC prescaler value
  76. \param[out] none
  77. \retval none
  78. */
  79. void rtc_prescaler_set(uint32_t psc)
  80. {
  81. rtc_configuration_mode_enter();
  82. /* set the RTC prescaler high bits */
  83. RTC_PSCH = ((psc & RTC_HIGH_BITS_MASK) >> RTC_HIGH_BITS_OFFSET);
  84. /* set the RTC prescaler low bits */
  85. RTC_PSCL = (psc & RTC_LOW_BITS_MASK);
  86. rtc_configuration_mode_exit();
  87. }
  88. /*!
  89. \brief wait RTC last write operation finished flag set
  90. \param[in] none
  91. \param[out] none
  92. \retval none
  93. */
  94. void rtc_lwoff_wait(void)
  95. {
  96. /* loop until LWOFF flag is set */
  97. while(RESET == (RTC_CTL & RTC_CTL_LWOFF)){
  98. }
  99. }
  100. /*!
  101. \brief wait RTC registers synchronized flag set
  102. \param[in] none
  103. \param[out] none
  104. \retval none
  105. */
  106. void rtc_register_sync_wait(void)
  107. {
  108. /* clear RSYNF flag */
  109. RTC_CTL &= ~RTC_CTL_RSYNF;
  110. /* loop until RSYNF flag is set */
  111. while(RESET == (RTC_CTL & RTC_CTL_RSYNF)){
  112. }
  113. }
  114. /*!
  115. \brief set RTC alarm value
  116. \param[in] alarm: RTC alarm value
  117. \param[out] none
  118. \retval none
  119. */
  120. void rtc_alarm_config(uint32_t alarm)
  121. {
  122. rtc_configuration_mode_enter();
  123. /* set the alarm high bits */
  124. RTC_ALRMH = (alarm >> RTC_HIGH_BITS_OFFSET);
  125. /* set the alarm low bits */
  126. RTC_ALRML = (alarm & RTC_LOW_BITS_MASK);
  127. rtc_configuration_mode_exit();
  128. }
  129. /*!
  130. \brief get RTC counter value
  131. \param[in] none
  132. \param[out] none
  133. \retval RTC counter value
  134. */
  135. uint32_t rtc_counter_get(void)
  136. {
  137. uint32_t temp = 0x0U;
  138. temp = RTC_CNTL;
  139. temp |= (RTC_CNTH << RTC_HIGH_BITS_OFFSET);
  140. return temp;
  141. }
  142. /*!
  143. \brief get RTC divider value
  144. \param[in] none
  145. \param[out] none
  146. \retval RTC divider value
  147. */
  148. uint32_t rtc_divider_get(void)
  149. {
  150. uint32_t temp = 0x00U;
  151. temp = ((RTC_DIVH & RTC_DIVH_DIV) << RTC_HIGH_BITS_OFFSET);
  152. temp |= RTC_DIVL;
  153. return temp;
  154. }
  155. /*!
  156. \brief get RTC flag status
  157. \param[in] flag: specify which flag status to get
  158. only one parameter can be selected which is shown as below:
  159. \arg RTC_FLAG_SECOND: second interrupt flag
  160. \arg RTC_FLAG_ALARM: alarm interrupt flag
  161. \arg RTC_FLAG_OVERFLOW: overflow interrupt flag
  162. \arg RTC_FLAG_RSYN: registers synchronized flag
  163. \arg RTC_FLAG_LWOF: last write operation finished flag
  164. \param[out] none
  165. \retval SET or RESET
  166. */
  167. FlagStatus rtc_flag_get(uint32_t flag)
  168. {
  169. if(RESET != (RTC_CTL & flag)){
  170. return SET;
  171. }else{
  172. return RESET;
  173. }
  174. }
  175. /*!
  176. \brief clear RTC flag status
  177. \param[in] flag: specify which flag status to clear
  178. one or more parameters can be selected which are shown as below:
  179. \arg RTC_FLAG_SECOND: second interrupt flag
  180. \arg RTC_FLAG_ALARM: alarm interrupt flag
  181. \arg RTC_FLAG_OVERFLOW: overflow interrupt flag
  182. \arg RTC_FLAG_RSYN: registers synchronized flag
  183. \param[out] none
  184. \retval none
  185. */
  186. void rtc_flag_clear(uint32_t flag)
  187. {
  188. /* clear RTC flag */
  189. RTC_CTL &= ~flag;
  190. }
  191. /*!
  192. \brief get RTC interrupt flag status
  193. \param[in] flag: specify which flag status to get
  194. only one parameter can be selected which is shown as below:
  195. \arg RTC_INT_FLAG_SECOND: second interrupt flag
  196. \arg RTC_INT_FLAG_ALARM: alarm interrupt flag
  197. \arg RTC_INT_FLAG_OVERFLOW: overflow interrupt flag
  198. \param[out] none
  199. \retval SET or RESET
  200. */
  201. FlagStatus rtc_interrupt_flag_get(uint32_t flag)
  202. {
  203. if(RESET != (RTC_CTL & flag)){
  204. return SET;
  205. }else{
  206. return RESET;
  207. }
  208. }
  209. /*!
  210. \brief clear RTC interrupt flag status
  211. \param[in] flag: specify which flag status to clear
  212. one or more parameters can be selected which are shown as below:
  213. \arg RTC_INT_FLAG_SECOND: second interrupt flag
  214. \arg RTC_INT_FLAG_ALARM: alarm interrupt flag
  215. \arg RTC_INT_FLAG_OVERFLOW: overflow interrupt flag
  216. \param[out] none
  217. \retval none
  218. */
  219. void rtc_interrupt_flag_clear(uint32_t flag)
  220. {
  221. /* clear RTC interrupt flag */
  222. RTC_CTL &= ~flag;
  223. }
  224. /*!
  225. \brief enable RTC interrupt
  226. \param[in] interrupt: specify which interrupt to enbale
  227. one or more parameters can be selected which are shown as below:
  228. \arg RTC_INT_SECOND: second interrupt
  229. \arg RTC_INT_ALARM: alarm interrupt
  230. \arg RTC_INT_OVERFLOW: overflow interrupt
  231. \param[out] none
  232. \retval none
  233. */
  234. void rtc_interrupt_enable(uint32_t interrupt)
  235. {
  236. RTC_INTEN |= interrupt;
  237. }
  238. /*!
  239. \brief disable RTC interrupt
  240. \param[in] interrupt: specify which interrupt to disbale
  241. one or more parameters can be selected which are shown as below:
  242. \arg RTC_INT_SECOND: second interrupt
  243. \arg RTC_INT_ALARM: alarm interrupt
  244. \arg RTC_INT_OVERFLOW: overflow interrupt
  245. \param[out] none
  246. \retval none
  247. */
  248. void rtc_interrupt_disable(uint32_t interrupt)
  249. {
  250. RTC_INTEN &= ~interrupt;
  251. }