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- #ifndef GD32F10X_EXMC_H
- #define GD32F10X_EXMC_H
- #include "gd32f10x.h"
- #define EXMC (EXMC_BASE)
- #define EXMC_SNCTL0 REG32(EXMC + 0x00U)
- #define EXMC_SNTCFG0 REG32(EXMC + 0x04U)
- #define EXMC_SNWTCFG0 REG32(EXMC + 0x104U)
- #define EXMC_SNCTL1 REG32(EXMC + 0x08U)
- #define EXMC_SNTCFG1 REG32(EXMC + 0x0CU)
- #define EXMC_SNWTCFG1 REG32(EXMC + 0x10CU)
- #define EXMC_SNCTL2 REG32(EXMC + 0x10U)
- #define EXMC_SNTCFG2 REG32(EXMC + 0x14U)
- #define EXMC_SNWTCFG2 REG32(EXMC + 0x114U)
- #define EXMC_SNCTL3 REG32(EXMC + 0x18U)
- #define EXMC_SNTCFG3 REG32(EXMC + 0x1CU)
- #define EXMC_SNWTCFG3 REG32(EXMC + 0x11CU)
- #define EXMC_NPCTL1 REG32(EXMC + 0x60U)
- #define EXMC_NPINTEN1 REG32(EXMC + 0x64U)
- #define EXMC_NPCTCFG1 REG32(EXMC + 0x68U)
- #define EXMC_NPATCFG1 REG32(EXMC + 0x6CU)
- #define EXMC_NECC1 REG32(EXMC + 0x74U)
- #define EXMC_NPCTL2 REG32(EXMC + 0x80U)
- #define EXMC_NPINTEN2 REG32(EXMC + 0x84U)
- #define EXMC_NPCTCFG2 REG32(EXMC + 0x88U)
- #define EXMC_NPATCFG2 REG32(EXMC + 0x8CU)
- #define EXMC_NECC2 REG32(EXMC + 0x94U)
- #define EXMC_NPCTL3 REG32(EXMC + 0xA0U)
- #define EXMC_NPINTEN3 REG32(EXMC + 0xA4U)
- #define EXMC_NPCTCFG3 REG32(EXMC + 0xA8U)
- #define EXMC_NPATCFG3 REG32(EXMC + 0xACU)
- #define EXMC_PIOTCFG3 REG32(EXMC + 0xB0U)
- #define EXMC_SNCTL_NRBKEN BIT(0)
- #define EXMC_SNCTL_NRMUX BIT(1)
- #define EXMC_SNCTL_NRTP BITS(2,3)
- #define EXMC_SNCTL_NRW BITS(4,5)
- #define EXMC_SNCTL_NREN BIT(6)
- #define EXMC_SNCTL_SBRSTEN BIT(8)
- #define EXMC_SNCTL_NRWTPOL BIT(9)
- #define EXMC_SNCTL_WRAPEN BIT(10)
- #define EXMC_SNCTL_NRWTCFG BIT(11)
- #define EXMC_SNCTL_WREN BIT(12)
- #define EXMC_SNCTL_NRWTEN BIT(13)
- #define EXMC_SNCTL_EXMODEN BIT(14)
- #define EXMC_SNCTL_ASYNCWAIT BIT(15)
- #define EXMC_SNCTL_SYNCWR BIT(19)
- #define EXMC_SNTCFG_ASET BITS(0,3)
- #define EXMC_SNTCFG_AHLD BITS(4,7)
- #define EXMC_SNTCFG_DSET BITS(8,15)
- #define EXMC_SNTCFG_BUSLAT BITS(16,19)
- #define EXMC_SNTCFG_CKDIV BITS(20,23)
- #define EXMC_SNTCFG_DLAT BITS(24,27)
- #define EXMC_SNTCFG_ASYNCMOD BITS(28,29)
- #define EXMC_SNWTCFG_WASET BITS(0,3)
- #define EXMC_SNWTCFG_WAHLD BITS(4,7)
- #define EXMC_SNWTCFG_WDSET BITS(8,15)
- #define EXMC_SNWTCFG_CKDIV BITS(20,23)
- #define EXMC_SNWTCFG_DLAT BITS(24,27)
- #define EXMC_SNWTCFG_WASYNCMOD BITS(28,29)
- #define EXMC_NPCTL_NDWTEN BIT(1)
- #define EXMC_NPCTL_NDBKEN BIT(2)
- #define EXMC_NPCTL_NDTP BIT(3)
- #define EXMC_NPCTL_NDW BITS(4,5)
- #define EXMC_NPCTL_ECCEN BIT(6)
- #define EXMC_NPCTL_CTR BITS(9,12)
- #define EXMC_NPCTL_ATR BITS(13,16)
- #define EXMC_NPCTL_ECCSZ BITS(17,19)
- #define EXMC_NPINTEN_INTRS BIT(0)
- #define EXMC_NPINTEN_INTHS BIT(1)
- #define EXMC_NPINTEN_INTFS BIT(2)
- #define EXMC_NPINTEN_INTREN BIT(3)
- #define EXMC_NPINTEN_INTHEN BIT(4)
- #define EXMC_NPINTEN_INTFEN BIT(5)
- #define EXMC_NPINTEN_FFEPT BIT(6)
- #define EXMC_NPCTCFG_COMSET BITS(0,7)
- #define EXMC_NPCTCFG_COMWAIT BITS(8,15)
- #define EXMC_NPCTCFG_COMHLD BITS(16,23)
- #define EXMC_NPCTCFG_COMHIZ BITS(24,31)
- #define EXMC_NPATCFG_ATTSET BITS(0,7)
- #define EXMC_NPATCFG_ATTWAIT BITS(8,15)
- #define EXMC_NPATCFG_ATTHLD BITS(16,23)
- #define EXMC_NPATCFG_ATTHIZ BITS(24,31)
- #define EXMC_PIOTCFG3_IOSET BITS(0,7)
- #define EXMC_PIOTCFG3_IOWAIT BITS(8,15)
- #define EXMC_PIOTCFG3_IOHLD BITS(16,23)
- #define EXMC_PIOTCFG3_IOHIZ BITS(24,31)
- #define EXMC_NECC_ECC BITS(0,31)
- typedef struct
- {
- uint32_t asyn_access_mode;
- uint32_t syn_data_latency;
- uint32_t syn_clk_division;
- uint32_t bus_latency;
- uint32_t asyn_data_setuptime;
- uint32_t asyn_address_holdtime;
- uint32_t asyn_address_setuptime;
- }exmc_norsram_timing_parameter_struct;
- typedef struct
- {
- uint32_t norsram_region;
- uint32_t write_mode;
- uint32_t extended_mode;
- uint32_t asyn_wait;
- uint32_t nwait_signal;
- uint32_t memory_write;
- uint32_t nwait_config;
- uint32_t wrap_burst_mode;
- uint32_t nwait_polarity;
- uint32_t burst_mode;
- uint32_t databus_width;
- uint32_t memory_type;
- uint32_t address_data_mux;
- exmc_norsram_timing_parameter_struct* read_write_timing;
- exmc_norsram_timing_parameter_struct* write_timing;
- }exmc_norsram_parameter_struct;
- typedef struct
- {
- uint32_t databus_hiztime;
- uint32_t holdtime;
- uint32_t waittime;
- uint32_t setuptime;
- }exmc_nand_pccard_timing_parameter_struct;
- typedef struct
- {
- uint32_t nand_bank;
- uint32_t ecc_size;
- uint32_t atr_latency;
- uint32_t ctr_latency;
- uint32_t ecc_logic;
- uint32_t databus_width;
- uint32_t wait_feature;
- exmc_nand_pccard_timing_parameter_struct* common_space_timing;
- exmc_nand_pccard_timing_parameter_struct* attribute_space_timing;
- }exmc_nand_parameter_struct;
- typedef struct
- {
- uint32_t atr_latency;
- uint32_t ctr_latency;
- uint32_t wait_feature;
- exmc_nand_pccard_timing_parameter_struct* common_space_timing;
- exmc_nand_pccard_timing_parameter_struct* attribute_space_timing;
- exmc_nand_pccard_timing_parameter_struct* io_space_timing;
- }exmc_pccard_parameter_struct;;
- #define EXMC_SNCTL(region) REG32(EXMC + 0x08U * (region))
- #define EXMC_SNTCFG(region) REG32(EXMC + 0x04U + 0x08U * (region))
- #define EXMC_SNWTCFG(region) REG32(EXMC + 0x104U + 0x08U * (region))
- #define EXMC_NPCTL(bank) REG32(EXMC + 0x40U + 0x20U * (bank))
- #define EXMC_NPINTEN(bank) REG32(EXMC + 0x44U + 0x20U * (bank))
- #define EXMC_NPCTCFG(bank) REG32(EXMC + 0x48U + 0x20U * (bank))
- #define EXMC_NPATCFG(bank) REG32(EXMC + 0x4CU + 0x20U * (bank))
- #define EXMC_NECC(bank) REG32(EXMC + 0x54U + 0x20U * (bank))
- #define SNCTL_NRW(regval) (BITS(4,5) & ((uint32_t)(regval) << 4))
- #define EXMC_NOR_DATABUS_WIDTH_8B SNCTL_NRW(0)
- #define EXMC_NOR_DATABUS_WIDTH_16B SNCTL_NRW(1)
- #define SNCTL_NRTP(regval) (BITS(2,3) & ((uint32_t)(regval) << 2))
- #define EXMC_MEMORY_TYPE_SRAM SNCTL_NRTP(0)
- #define EXMC_MEMORY_TYPE_PSRAM SNCTL_NRTP(1)
- #define EXMC_MEMORY_TYPE_NOR SNCTL_NRTP(2)
- #define SNTCFG_ASYNCMOD(regval) (BITS(28,29) & ((uint32_t)(regval) << 28))
- #define EXMC_ACCESS_MODE_A SNTCFG_ASYNCMOD(0)
- #define EXMC_ACCESS_MODE_B SNTCFG_ASYNCMOD(1)
- #define EXMC_ACCESS_MODE_C SNTCFG_ASYNCMOD(2)
- #define EXMC_ACCESS_MODE_D SNTCFG_ASYNCMOD(3)
- #define SNTCFG_DLAT(regval) (BITS(24,27) & ((uint32_t)(regval) << 24))
- #define EXMC_DATALAT_2_CLK SNTCFG_DLAT(0)
- #define EXMC_DATALAT_3_CLK SNTCFG_DLAT(1)
- #define EXMC_DATALAT_4_CLK SNTCFG_DLAT(2)
- #define EXMC_DATALAT_5_CLK SNTCFG_DLAT(3)
- #define EXMC_DATALAT_6_CLK SNTCFG_DLAT(4)
- #define EXMC_DATALAT_7_CLK SNTCFG_DLAT(5)
- #define EXMC_DATALAT_8_CLK SNTCFG_DLAT(6)
- #define EXMC_DATALAT_9_CLK SNTCFG_DLAT(7)
- #define EXMC_DATALAT_10_CLK SNTCFG_DLAT(8)
- #define EXMC_DATALAT_11_CLK SNTCFG_DLAT(9)
- #define EXMC_DATALAT_12_CLK SNTCFG_DLAT(10)
- #define EXMC_DATALAT_13_CLK SNTCFG_DLAT(11)
- #define EXMC_DATALAT_14_CLK SNTCFG_DLAT(12)
- #define EXMC_DATALAT_15_CLK SNTCFG_DLAT(13)
- #define EXMC_DATALAT_16_CLK SNTCFG_DLAT(14)
- #define EXMC_DATALAT_17_CLK SNTCFG_DLAT(15)
- #define SNTCFG_CKDIV(regval) (BITS(20,23) & ((uint32_t)(regval) << 20))
- #define EXMC_SYN_CLOCK_RATIO_DISABLE SNTCFG_CKDIV(0)
- #define EXMC_SYN_CLOCK_RATIO_2_CLK SNTCFG_CKDIV(1)
- #define EXMC_SYN_CLOCK_RATIO_3_CLK SNTCFG_CKDIV(2)
- #define EXMC_SYN_CLOCK_RATIO_4_CLK SNTCFG_CKDIV(3)
- #define EXMC_SYN_CLOCK_RATIO_5_CLK SNTCFG_CKDIV(4)
- #define EXMC_SYN_CLOCK_RATIO_6_CLK SNTCFG_CKDIV(5)
- #define EXMC_SYN_CLOCK_RATIO_7_CLK SNTCFG_CKDIV(6)
- #define EXMC_SYN_CLOCK_RATIO_8_CLK SNTCFG_CKDIV(7)
- #define EXMC_SYN_CLOCK_RATIO_9_CLK SNTCFG_CKDIV(8)
- #define EXMC_SYN_CLOCK_RATIO_10_CLK SNTCFG_CKDIV(9)
- #define EXMC_SYN_CLOCK_RATIO_11_CLK SNTCFG_CKDIV(10)
- #define EXMC_SYN_CLOCK_RATIO_12_CLK SNTCFG_CKDIV(11)
- #define EXMC_SYN_CLOCK_RATIO_13_CLK SNTCFG_CKDIV(12)
- #define EXMC_SYN_CLOCK_RATIO_14_CLK SNTCFG_CKDIV(13)
- #define EXMC_SYN_CLOCK_RATIO_15_CLK SNTCFG_CKDIV(14)
- #define EXMC_SYN_CLOCK_RATIO_16_CLK SNTCFG_CKDIV(15)
- #define NPCTL_ECCSZ(regval) (BITS(17,19) & ((uint32_t)(regval) << 17))
- #define EXMC_ECC_SIZE_256BYTES NPCTL_ECCSZ(0)
- #define EXMC_ECC_SIZE_512BYTES NPCTL_ECCSZ(1)
- #define EXMC_ECC_SIZE_1024BYTES NPCTL_ECCSZ(2)
- #define EXMC_ECC_SIZE_2048BYTES NPCTL_ECCSZ(3)
- #define EXMC_ECC_SIZE_4096BYTES NPCTL_ECCSZ(4)
- #define EXMC_ECC_SIZE_8192BYTES NPCTL_ECCSZ(5)
- #define NPCTL_ATR(regval) (BITS(13,16) & ((uint32_t)(regval) << 13))
- #define EXMC_ALE_RE_DELAY_1_HCLK NPCTL_ATR(0)
- #define EXMC_ALE_RE_DELAY_2_HCLK NPCTL_ATR(1)
- #define EXMC_ALE_RE_DELAY_3_HCLK NPCTL_ATR(2)
- #define EXMC_ALE_RE_DELAY_4_HCLK NPCTL_ATR(3)
- #define EXMC_ALE_RE_DELAY_5_HCLK NPCTL_ATR(4)
- #define EXMC_ALE_RE_DELAY_6_HCLK NPCTL_ATR(5)
- #define EXMC_ALE_RE_DELAY_7_HCLK NPCTL_ATR(6)
- #define EXMC_ALE_RE_DELAY_8_HCLK NPCTL_ATR(7)
- #define EXMC_ALE_RE_DELAY_9_HCLK NPCTL_ATR(8)
- #define EXMC_ALE_RE_DELAY_10_HCLK NPCTL_ATR(9)
- #define EXMC_ALE_RE_DELAY_11_HCLK NPCTL_ATR(10)
- #define EXMC_ALE_RE_DELAY_12_HCLK NPCTL_ATR(11)
- #define EXMC_ALE_RE_DELAY_13_HCLK NPCTL_ATR(12)
- #define EXMC_ALE_RE_DELAY_14_HCLK NPCTL_ATR(13)
- #define EXMC_ALE_RE_DELAY_15_HCLK NPCTL_ATR(14)
- #define EXMC_ALE_RE_DELAY_16_HCLK NPCTL_ATR(15)
- #define NPCTL_CTR(regval) (BITS(9,12) & ((uint32_t)(regval) << 9))
- #define EXMC_CLE_RE_DELAY_1_HCLK NPCTL_CTR(0)
- #define EXMC_CLE_RE_DELAY_2_HCLK NPCTL_CTR(1)
- #define EXMC_CLE_RE_DELAY_3_HCLK NPCTL_CTR(2)
- #define EXMC_CLE_RE_DELAY_4_HCLK NPCTL_CTR(3)
- #define EXMC_CLE_RE_DELAY_5_HCLK NPCTL_CTR(4)
- #define EXMC_CLE_RE_DELAY_6_HCLK NPCTL_CTR(5)
- #define EXMC_CLE_RE_DELAY_7_HCLK NPCTL_CTR(6)
- #define EXMC_CLE_RE_DELAY_8_HCLK NPCTL_CTR(7)
- #define EXMC_CLE_RE_DELAY_9_HCLK NPCTL_CTR(8)
- #define EXMC_CLE_RE_DELAY_10_HCLK NPCTL_CTR(9)
- #define EXMC_CLE_RE_DELAY_11_HCLK NPCTL_CTR(10)
- #define EXMC_CLE_RE_DELAY_12_HCLK NPCTL_CTR(11)
- #define EXMC_CLE_RE_DELAY_13_HCLK NPCTL_CTR(12)
- #define EXMC_CLE_RE_DELAY_14_HCLK NPCTL_CTR(13)
- #define EXMC_CLE_RE_DELAY_15_HCLK NPCTL_CTR(14)
- #define EXMC_CLE_RE_DELAY_16_HCLK NPCTL_CTR(15)
- #define NPCTL_NDW(regval) (BITS(4,5) & ((uint32_t)(regval) << 4))
- #define EXMC_NAND_DATABUS_WIDTH_8B NPCTL_NDW(0)
- #define EXMC_NAND_DATABUS_WIDTH_16B NPCTL_NDW(1)
- #define EXMC_BANK0_NORSRAM_REGION0 ((uint32_t)0x00000000U)
- #define EXMC_BANK0_NORSRAM_REGION1 ((uint32_t)0x00000001U)
- #define EXMC_BANK0_NORSRAM_REGION2 ((uint32_t)0x00000002U)
- #define EXMC_BANK0_NORSRAM_REGION3 ((uint32_t)0x00000003U)
- #define EXMC_ASYN_WRITE ((uint32_t)0x00000000U)
- #define EXMC_SYN_WRITE ((uint32_t)0x00080000U)
- #define EXMC_NWAIT_CONFIG_BEFORE ((uint32_t)0x00000000U)
- #define EXMC_NWAIT_CONFIG_DURING ((uint32_t)0x00000800U)
- #define EXMC_NWAIT_POLARITY_LOW ((uint32_t)0x00000000U)
- #define EXMC_NWAIT_POLARITY_HIGH ((uint32_t)0x00000200U)
- #define EXMC_BANK1_NAND ((uint32_t)0x00000001U)
- #define EXMC_BANK2_NAND ((uint32_t)0x00000002U)
- #define EXMC_BANK3_PCCARD ((uint32_t)0x00000003U)
- #define EXMC_NAND_PCCARD_FLAG_RISE EXMC_NPINTEN_INTRS
- #define EXMC_NAND_PCCARD_FLAG_LEVEL EXMC_NPINTEN_INTHS
- #define EXMC_NAND_PCCARD_FLAG_FALL EXMC_NPINTEN_INTFS
- #define EXMC_NAND_PCCARD_FLAG_FIFOE EXMC_NPINTEN_FFEPT
- #define EXMC_NAND_PCCARD_INT_RISE EXMC_NPINTEN_INTREN
- #define EXMC_NAND_PCCARD_INT_LEVEL EXMC_NPINTEN_INTHEN
- #define EXMC_NAND_PCCARD_INT_FALL EXMC_NPINTEN_INTFEN
- void exmc_norsram_deinit(uint32_t norsram_region);
- void exmc_norsram_struct_para_init(exmc_norsram_parameter_struct* exmc_norsram_init_struct);
- void exmc_norsram_init(exmc_norsram_parameter_struct* exmc_norsram_init_struct);
- void exmc_norsram_enable(uint32_t norsram_region);
- void exmc_norsram_disable(uint32_t norsram_region);
- void exmc_nand_deinit(uint32_t nand_bank);
- void exmc_nand_init(exmc_nand_parameter_struct* exmc_nand_init_struct);
- void exmc_nand_struct_para_init(exmc_nand_parameter_struct* exmc_nand_init_struct);
- void exmc_nand_enable(uint32_t nand_bank);
- void exmc_nand_disable(uint32_t nand_bank);
- void exmc_nand_ecc_config(uint32_t nand_bank, ControlStatus newvalue);
- uint32_t exmc_ecc_get(uint32_t nand_bank);
- void exmc_pccard_deinit(void);
- void exmc_pccard_init(exmc_pccard_parameter_struct* exmc_pccard_init_struct);
- void exmc_pccard_struct_para_init(exmc_pccard_parameter_struct* exmc_pccard_init_struct);
- void exmc_pccard_enable(void);
- void exmc_pccard_disable(void);
- void exmc_interrupt_enable(uint32_t bank, uint32_t interrupt_source);
- void exmc_interrupt_disable(uint32_t bank, uint32_t interrupt_source);
- FlagStatus exmc_flag_get(uint32_t bank, uint32_t flag);
- void exmc_flag_clear(uint32_t bank, uint32_t flag);
- FlagStatus exmc_interrupt_flag_get(uint32_t bank, uint32_t interrupt_source);
- void exmc_interrupt_flag_clear(uint32_t bank, uint32_t interrupt_source);
- #endif
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