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- #ifndef GD32F10X_DBG_H
- #define GD32F10X_DBG_H
- #include "gd32f10x.h"
- #define DBG DBG_BASE
- #define DBG_ID REG32(DBG + 0x00U)
- #define DBG_CTL REG32(DBG + 0x04U)
- #define DBG_ID_ID_CODE BITS(0,31)
- #define DBG_CTL_SLP_HOLD BIT(0)
- #define DBG_CTL_DSLP_HOLD BIT(1)
- #define DBG_CTL_STB_HOLD BIT(2)
- #define DBG_CTL_TRACE_IOEN BIT(5)
- #define DBG_CTL_TRACE_MODE BITS(6,7)
- #define DBG_CTL_FWDGT_HOLD BIT(8)
- #define DBG_CTL_WWDGT_HOLD BIT(9)
- #define DBG_CTL_TIMER0_HOLD BIT(10)
- #define DBG_CTL_TIMER1_HOLD BIT(11)
- #define DBG_CTL_TIMER2_HOLD BIT(12)
- #define DBG_CTL_TIMER3_HOLD BIT(13)
- #define DBG_CTL_CAN0_HOLD BIT(14)
- #define DBG_CTL_I2C0_HOLD BIT(15)
- #define DBG_CTL_I2C1_HOLD BIT(16)
- #define DBG_CTL_TIMER7_HOLD BIT(17)
- #define DBG_CTL_TIMER4_HOLD BIT(18)
- #define DBG_CTL_TIMER5_HOLD BIT(19)
- #define DBG_CTL_TIMER6_HOLD BIT(20)
- #ifdef GD32F10X_CL
- #define DBG_CTL_CAN1_HOLD BIT(21)
- #endif
- #ifdef GD32F10X_XD
- #define DBG_CTL_TIMER11_HOLD BIT(25)
- #define DBG_CTL_TIMER12_HOLD BIT(26)
- #define DBG_CTL_TIMER13_HOLD BIT(27)
- #define DBG_CTL_TIMER8_HOLD BIT(28)
- #define DBG_CTL_TIMER9_HOLD BIT(29)
- #define DBG_CTL_TIMER10_HOLD BIT(30)
- #endif
- typedef enum
- {
- DBG_FWDGT_HOLD = BIT(8),
- DBG_WWDGT_HOLD = BIT(9),
- DBG_TIMER0_HOLD = BIT(10),
- DBG_TIMER1_HOLD = BIT(11),
- DBG_TIMER2_HOLD = BIT(12),
- DBG_TIMER3_HOLD = BIT(13),
- DBG_CAN0_HOLD = BIT(14),
- DBG_I2C0_HOLD = BIT(15),
- DBG_I2C1_HOLD = BIT(16),
- DBG_TIMER7_HOLD = BIT(17),
- DBG_TIMER4_HOLD = BIT(18),
- DBG_TIMER5_HOLD = BIT(19),
- DBG_TIMER6_HOLD = BIT(20),
- #ifdef GD32F10X_CL
- DBG_CAN1_HOLD = BIT(21),
- #endif
- #if (defined(GD32F10X_XD) || defined(GD32F10X_CL))
- DBG_TIMER11_HOLD = BIT(25),
- DBG_TIMER12_HOLD = BIT(26),
- DBG_TIMER13_HOLD = BIT(27),
- DBG_TIMER8_HOLD = BIT(28),
- DBG_TIMER9_HOLD = BIT(29),
- DBG_TIMER10_HOLD = BIT(30),
- #endif
- }dbg_periph_enum;
- #define DBG_LOW_POWER_SLEEP DBG_CTL_SLP_HOLD
- #define DBG_LOW_POWER_DEEPSLEEP DBG_CTL_DSLP_HOLD
- #define DBG_LOW_POWER_STANDBY DBG_CTL_STB_HOLD
- #define CTL_TRACE_MODE(regval) (BITS(6,7) & ((uint32_t)(regval) << 6U))
- #define TRACE_MODE_ASYNC CTL_TRACE_MODE(0)
- #define TRACE_MODE_SYNC_DATASIZE_1 CTL_TRACE_MODE(1)
- #define TRACE_MODE_SYNC_DATASIZE_2 CTL_TRACE_MODE(2)
- #define TRACE_MODE_SYNC_DATASIZE_4 CTL_TRACE_MODE(3)
- uint32_t dbg_id_get(void);
- void dbg_low_power_enable(uint32_t dbg_low_power);
- void dbg_low_power_disable(uint32_t dbg_low_power);
- void dbg_periph_enable(dbg_periph_enum dbg_periph);
- void dbg_periph_disable(dbg_periph_enum dbg_periph);
- void dbg_trace_pin_enable(void);
- void dbg_trace_pin_disable(void);
- void dbg_trace_pin_mode_set(uint32_t trace_mode)
- #endif
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