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- #ifndef GD32F10x_ADC_H
- #define GD32F10x_ADC_H
- #include "gd32f10x.h"
- #define ADC0 ADC_BASE
- #define ADC1 (ADC_BASE + 0x400U)
- #define ADC2 (ADC_BASE + 0x1800U)
- #define ADC_STAT(adcx) REG32((adcx) + 0x00U)
- #define ADC_CTL0(adcx) REG32((adcx) + 0x04U)
- #define ADC_CTL1(adcx) REG32((adcx) + 0x08U)
- #define ADC_SAMPT0(adcx) REG32((adcx) + 0x0CU)
- #define ADC_SAMPT1(adcx) REG32((adcx) + 0x10U)
- #define ADC_IOFF0(adcx) REG32((adcx) + 0x14U)
- #define ADC_IOFF1(adcx) REG32((adcx) + 0x18U)
- #define ADC_IOFF2(adcx) REG32((adcx) + 0x1CU)
- #define ADC_IOFF3(adcx) REG32((adcx) + 0x20U)
- #define ADC_WDHT(adcx) REG32((adcx) + 0x24U)
- #define ADC_WDLT(adcx) REG32((adcx) + 0x28U)
- #define ADC_RSQ0(adcx) REG32((adcx) + 0x2CU)
- #define ADC_RSQ1(adcx) REG32((adcx) + 0x30U)
- #define ADC_RSQ2(adcx) REG32((adcx) + 0x34U)
- #define ADC_ISQ(adcx) REG32((adcx) + 0x38U)
- #define ADC_IDATA0(adcx) REG32((adcx) + 0x3CU)
- #define ADC_IDATA1(adcx) REG32((adcx) + 0x40U)
- #define ADC_IDATA2(adcx) REG32((adcx) + 0x44U)
- #define ADC_IDATA3(adcx) REG32((adcx) + 0x48U)
- #define ADC_RDATA(adcx) REG32((adcx) + 0x4CU)
- #define ADC_STAT_WDE BIT(0)
- #define ADC_STAT_EOC BIT(1)
- #define ADC_STAT_EOIC BIT(2)
- #define ADC_STAT_STIC BIT(3)
- #define ADC_STAT_STRC BIT(4)
- #define ADC_CTL0_WDCHSEL BITS(0,4)
- #define ADC_CTL0_EOCIE BIT(5)
- #define ADC_CTL0_WDEIE BIT(6)
- #define ADC_CTL0_EOICIE BIT(7)
- #define ADC_CTL0_SM BIT(8)
- #define ADC_CTL0_WDSC BIT(9)
- #define ADC_CTL0_ICA BIT(10)
- #define ADC_CTL0_DISRC BIT(11)
- #define ADC_CTL0_DISIC BIT(12)
- #define ADC_CTL0_DISNUM BITS(13,15)
- #define ADC_CTL0_SYNCM BITS(16,19)
- #define ADC_CTL0_IWDEN BIT(22)
- #define ADC_CTL0_RWDEN BIT(23)
- #define ADC_CTL0_DRES BITS(24,25)
- #define ADC_CTL1_ADCON BIT(0)
- #define ADC_CTL1_CTN BIT(1)
- #define ADC_CTL1_CLB BIT(2)
- #define ADC_CTL1_RSTCLB BIT(3)
- #define ADC_CTL1_DMA BIT(8)
- #define ADC_CTL1_DAL BIT(11)
- #define ADC_CTL1_ETSIC BITS(12,14)
- #define ADC_CTL1_ETEIC BIT(15)
- #define ADC_CTL1_ETSRC BITS(17,19)
- #define ADC_CTL1_ETERC BIT(20)
- #define ADC_CTL1_SWICST BIT(21)
- #define ADC_CTL1_SWRCST BIT(22)
- #define ADC_CTL1_TSVREN BIT(23)
- #define ADC_SAMPTX_SPTN BITS(0,2)
- #define ADC_IOFFX_IOFF BITS(0,11)
- #define ADC_WDHT_WDHT BITS(0,11)
- #define ADC_WDLT_WDLT BITS(0,11)
- #define ADC_RSQX_RSQN BITS(0,4)
- #define ADC_RSQ0_RL BITS(20,23)
- #define ADC_ISQ_ISQN BITS(0,4)
- #define ADC_ISQ_IL BITS(20,21)
- #define ADC_IDATAX_IDATAN BITS(0,15)
- #define ADC_RDATA_RDATA BITS(0,15)
- #define ADC_RDATA_ADC1RDTR BITS(16,31)
- #define ADC_FLAG_WDE ADC_STAT_WDE
- #define ADC_FLAG_EOC ADC_STAT_EOC
- #define ADC_FLAG_EOIC ADC_STAT_EOIC
- #define ADC_FLAG_STIC ADC_STAT_STIC
- #define ADC_FLAG_STRC ADC_STAT_STRC
- #define CTL0_DISNUM(regval) (BITS(13,15) & ((uint32_t)(regval) << 13))
- #define ADC_SCAN_MODE ADC_CTL0_SM
- #define ADC_INSERTED_CHANNEL_AUTO ADC_CTL0_ICA
- #define CTL0_SYNCM(regval) (BITS(16,19) & ((uint32_t)(regval) << 16))
- #define ADC_MODE_FREE CTL0_SYNCM(0)
- #define ADC_DAUL_REGULAL_PARALLEL_INSERTED_PARALLEL CTL0_SYNCM(1)
- #define ADC_DAUL_REGULAL_PARALLEL_INSERTED_ROTATION CTL0_SYNCM(2)
- #define ADC_DAUL_INSERTED_PARALLEL_REGULAL_FOLLOWUP_FAST CTL0_SYNCM(3)
- #define ADC_DAUL_INSERTED_PARALLEL_REGULAL_FOLLOWUP_SLOW CTL0_SYNCM(4)
- #define ADC_DAUL_INSERTED_PARALLEL CTL0_SYNCM(5)
- #define ADC_DAUL_REGULAL_PARALLEL CTL0_SYNCM(6)
- #define ADC_DAUL_REGULAL_FOLLOWUP_FAST CTL0_SYNCM(7)
- #define ADC_DAUL_REGULAL_FOLLOWUP_SLOW CTL0_SYNCM(8)
- #define ADC_DAUL_INSERTED_TRIGGER_ROTATION CTL0_SYNCM(9)
- #define ADC_DATAALIGN_RIGHT ((uint32_t)0x00000000U)
- #define ADC_DATAALIGN_LEFT ADC_CTL1_DAL
- #define ADC_CONTINUOUS_MODE ADC_CTL1_CTN
- #define CTL1_ETSRC(regval) (BITS(17,19) & ((uint32_t)(regval) << 17))
- #define ADC0_1_EXTTRIG_REGULAR_T0_CH0 CTL1_ETSRC(0)
- #define ADC0_1_EXTTRIG_REGULAR_T0_CH1 CTL1_ETSRC(1)
- #define ADC0_1_EXTTRIG_REGULAR_T0_CH2 CTL1_ETSRC(2)
- #define ADC0_1_EXTTRIG_REGULAR_T1_CH1 CTL1_ETSRC(3)
- #define ADC0_1_EXTTRIG_REGULAR_T2_TRGO CTL1_ETSRC(4)
- #define ADC0_1_EXTTRIG_REGULAR_T3_CH3 CTL1_ETSRC(5)
- #define ADC0_1_EXTTRIG_REGULAR_T7_TRGO CTL1_ETSRC(6)
- #define ADC0_1_EXTTRIG_REGULAR_EXTI_11 CTL1_ETSRC(6)
- #define ADC0_1_2_EXTTRIG_REGULAR_NONE CTL1_ETSRC(7)
- #define ADC2_EXTTRIG_REGULAR_T2_CH0 CTL1_ETSRC(0)
- #define ADC2_EXTTRIG_REGULAR_T1_CH2 CTL1_ETSRC(1)
- #define ADC2_EXTTRIG_REGULAR_T0_CH2 CTL1_ETSRC(2)
- #define ADC2_EXTTRIG_REGULAR_T7_CH0 CTL1_ETSRC(3)
- #define ADC2_EXTTRIG_REGULAR_T7_TRGO CTL1_ETSRC(4)
- #define ADC2_EXTTRIG_REGULAR_T4_CH0 CTL1_ETSRC(5)
- #define ADC2_EXTTRIG_REGULAR_T4_CH2 CTL1_ETSRC(6)
- #define CTL1_ETSIC(regval) (BITS(12,14) & ((uint32_t)(regval) << 12))
- #define ADC0_1_EXTTRIG_INSERTED_T0_TRGO CTL1_ETSIC(0)
- #define ADC0_1_EXTTRIG_INSERTED_T0_CH3 CTL1_ETSIC(1)
- #define ADC0_1_EXTTRIG_INSERTED_T1_TRGO CTL1_ETSIC(2)
- #define ADC0_1_EXTTRIG_INSERTED_T1_CH0 CTL1_ETSIC(3)
- #define ADC0_1_EXTTRIG_INSERTED_T2_CH3 CTL1_ETSIC(4)
- #define ADC0_1_EXTTRIG_INSERTED_T3_TRGO CTL1_ETSIC(5)
- #define ADC0_1_EXTTRIG_INSERTED_EXTI_15 CTL1_ETSIC(6)
- #define ADC0_1_EXTTRIG_INSERTED_T7_CH3 CTL1_ETSIC(6)
- #define ADC0_1_2_EXTTRIG_INSERTED_NONE CTL1_ETSIC(7)
- #define ADC2_EXTTRIG_INSERTED_T0_TRGO CTL1_ETSIC(0)
- #define ADC2_EXTTRIG_INSERTED_T0_CH3 CTL1_ETSIC(1)
- #define ADC2_EXTTRIG_INSERTED_T3_CH2 CTL1_ETSIC(2)
- #define ADC2_EXTTRIG_INSERTED_T7_CH1 CTL1_ETSIC(3)
- #define ADC2_EXTTRIG_INSERTED_T7_CH3 CTL1_ETSIC(4)
- #define ADC2_EXTTRIG_INSERTED_T4_TRGO CTL1_ETSIC(5)
- #define ADC2_EXTTRIG_INSERTED_T4_CH3 CTL1_ETSIC(6)
- #define SAMPTX_SPT(regval) (BITS(0,2) & ((uint32_t)(regval) << 0))
- #define ADC_SAMPLETIME_1POINT5 SAMPTX_SPT(0)
- #define ADC_SAMPLETIME_7POINT5 SAMPTX_SPT(1)
- #define ADC_SAMPLETIME_13POINT5 SAMPTX_SPT(2)
- #define ADC_SAMPLETIME_28POINT5 SAMPTX_SPT(3)
- #define ADC_SAMPLETIME_41POINT5 SAMPTX_SPT(4)
- #define ADC_SAMPLETIME_55POINT5 SAMPTX_SPT(5)
- #define ADC_SAMPLETIME_71POINT5 SAMPTX_SPT(6)
- #define ADC_SAMPLETIME_239POINT5 SAMPTX_SPT(7)
- #define IOFFX_IOFF(regval) (BITS(0,11) & ((uint32_t)(regval) << 0))
- #define WDHT_WDHT(regval) (BITS(0,11) & ((uint32_t)(regval) << 0))
- #define WDLT_WDLT(regval) (BITS(0,11) & ((uint32_t)(regval) << 0))
- #define RSQ0_RL(regval) (BITS(20,23) & ((uint32_t)(regval) << 20))
- #define ISQ_IL(regval) (BITS(20,21) & ((uint32_t)(regval) << 20))
- #define ADC_REGULAR_CHANNEL ((uint8_t)0x01U)
- #define ADC_INSERTED_CHANNEL ((uint8_t)0x02U)
- #define ADC_REGULAR_INSERTED_CHANNEL ((uint8_t)0x03U)
- #define ADC_CHANNEL_DISCON_DISABLE ((uint8_t)0x04U)
- #define ADC_INSERTED_CHANNEL_0 ((uint8_t)0x00U)
- #define ADC_INSERTED_CHANNEL_1 ((uint8_t)0x01U)
- #define ADC_INSERTED_CHANNEL_2 ((uint8_t)0x02U)
- #define ADC_INSERTED_CHANNEL_3 ((uint8_t)0x03U)
- #define ADC_CHANNEL_0 ((uint8_t)0x00U)
- #define ADC_CHANNEL_1 ((uint8_t)0x01U)
- #define ADC_CHANNEL_2 ((uint8_t)0x02U)
- #define ADC_CHANNEL_3 ((uint8_t)0x03U)
- #define ADC_CHANNEL_4 ((uint8_t)0x04U)
- #define ADC_CHANNEL_5 ((uint8_t)0x05U)
- #define ADC_CHANNEL_6 ((uint8_t)0x06U)
- #define ADC_CHANNEL_7 ((uint8_t)0x07U)
- #define ADC_CHANNEL_8 ((uint8_t)0x08U)
- #define ADC_CHANNEL_9 ((uint8_t)0x09U)
- #define ADC_CHANNEL_10 ((uint8_t)0x0AU)
- #define ADC_CHANNEL_11 ((uint8_t)0x0BU)
- #define ADC_CHANNEL_12 ((uint8_t)0x0CU)
- #define ADC_CHANNEL_13 ((uint8_t)0x0DU)
- #define ADC_CHANNEL_14 ((uint8_t)0x0EU)
- #define ADC_CHANNEL_15 ((uint8_t)0x0FU)
- #define ADC_CHANNEL_16 ((uint8_t)0x10U)
- #define ADC_CHANNEL_17 ((uint8_t)0x11U)
- #define ADC_INT_WDE ADC_STAT_WDE
- #define ADC_INT_EOC ADC_STAT_EOC
- #define ADC_INT_EOIC ADC_STAT_EOIC
- #define ADC_INT_FLAG_WDE ADC_STAT_WDE
- #define ADC_INT_FLAG_EOC ADC_STAT_EOC
- #define ADC_INT_FLAG_EOIC ADC_STAT_EOIC
- void adc_deinit(uint32_t adc_periph);
- void adc_mode_config(uint32_t mode);
- void adc_special_function_config(uint32_t adc_periph, uint32_t function, ControlStatus newvalue);
- void adc_data_alignment_config(uint32_t adc_periph, uint32_t data_alignment);
- void adc_enable(uint32_t adc_periph);
- void adc_disable(uint32_t adc_periph);
- void adc_calibration_enable(uint32_t adc_periph);
- void adc_tempsensor_vrefint_enable(void);
- void adc_tempsensor_vrefint_disable(void);
- void adc_dma_mode_enable(uint32_t adc_periph);
- void adc_dma_mode_disable(uint32_t adc_periph);
- void adc_discontinuous_mode_config(uint32_t adc_periph, uint8_t adc_channel_group, uint8_t length);
- void adc_channel_length_config(uint32_t adc_periph, uint8_t adc_channel_group, uint32_t length);
- void adc_regular_channel_config(uint32_t adc_periph, uint8_t rank, uint8_t adc_channel, uint32_t sample_time);
- void adc_inserted_channel_config(uint32_t adc_periph, uint8_t rank, uint8_t adc_channel, uint32_t sample_time);
- void adc_inserted_channel_offset_config(uint32_t adc_periph, uint8_t inserted_channel, uint16_t offset);
- void adc_external_trigger_source_config(uint32_t adc_periph, uint8_t adc_channel_group, uint32_t external_trigger_source);
- void adc_external_trigger_config(uint32_t adc_periph, uint8_t adc_channel_group, ControlStatus newvalue);
- void adc_software_trigger_enable(uint32_t adc_periph, uint8_t adc_channel_group);
- uint16_t adc_regular_data_read(uint32_t adc_periph);
- uint16_t adc_inserted_data_read(uint32_t adc_periph, uint8_t inserted_channel);
- uint32_t adc_sync_mode_convert_value_read(void);
- void adc_watchdog_single_channel_enable(uint32_t adc_periph, uint8_t adc_channel);
- void adc_watchdog_group_channel_enable(uint32_t adc_periph, uint8_t adc_channel_group);
- void adc_watchdog_disable(uint32_t adc_periph);
- void adc_watchdog_threshold_config(uint32_t adc_periph, uint16_t low_threshold, uint16_t high_threshold);
- FlagStatus adc_flag_get(uint32_t adc_periph, uint32_t adc_flag);
- void adc_flag_clear(uint32_t adc_periph, uint32_t adc_flag);
- FlagStatus adc_regular_software_startconv_flag_get(uint32_t adc_periph);
- FlagStatus adc_inserted_software_startconv_flag_get(uint32_t adc_periph);
- FlagStatus adc_interrupt_flag_get(uint32_t adc_periph, uint32_t adc_interrupt);
- void adc_interrupt_flag_clear(uint32_t adc_periph, uint32_t adc_interrupt);
- void adc_interrupt_enable(uint32_t adc_periph, uint32_t adc_interrupt);
- void adc_interrupt_disable(uint32_t adc_periph, uint32_t adc_interrupt);
- #endif
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