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bootloader.htm

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  1. <!doctype html public "-//w3c//dtd html 4.0 transitional//en">
    2. 

  2. <html><head>
    3. 

  3. <title>Static Call Graph - [..\OBJ\bootloader.axf]</title></head>
    4. 

  4. <body><HR>
    5. 

  5. <H1>Static Call Graph for image ..\OBJ\bootloader.axf</H1><HR>
    6. 

  6. <BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060960: Last Updated: Fri Oct 27 20:23:53 2023
    7. 

  7. <BR><P>
    8. 

  8. <H3>Maximum Stack Usage =       2172 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
    9. 

  9. Call chain for Maximum Stack Depth:</H3>
    10. 

  10. main &rArr; BootLoader_Brance &rArr; FLASH_Write &rArr; FLASH_WriteNotErase &rArr; fmc_halfword_program &rArr; fmc_bank1_ready_wait
    11. 

  11. <P>
    12. 

  12. <H3>
    13. 

  13. Mutually Recursive functions
    14. 

  14. </H3> <LI><a href="#[1c]">ADC0_1_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1c]">ADC0_1_IRQHandler</a><BR>
    15. 

  15. </UL>
    16. 

  16. <P>
    17. 

  17. <H3>
    18. 

  18. Function Pointers
    19. 

  19. </H3><UL>
    20. 

  20.  <LI><a href="#[1c]">ADC0_1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    21. 

  21.  <LI><a href="#[39]">ADC2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    22. 

  22.  <LI><a href="#[4]">BusFault_Handler</a> from gd32f10x_it.o(i.BusFault_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    23. 

  23.  <LI><a href="#[20]">CAN0_EWMC_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    24. 

  24.  <LI><a href="#[1f]">CAN0_RX1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    25. 

  25.  <LI><a href="#[15]">DMA0_Channel0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    26. 

  26.  <LI><a href="#[16]">DMA0_Channel1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    27. 

  27.  <LI><a href="#[17]">DMA0_Channel2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    28. 

  28.  <LI><a href="#[18]">DMA0_Channel3_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    29. 

  29.  <LI><a href="#[19]">DMA0_Channel4_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    30. 

  30.  <LI><a href="#[1a]">DMA0_Channel5_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    31. 

  31.  <LI><a href="#[1b]">DMA0_Channel6_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    32. 

  32.  <LI><a href="#[42]">DMA1_Channel0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    33. 

  33.  <LI><a href="#[43]">DMA1_Channel1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    34. 

  34.  <LI><a href="#[44]">DMA1_Channel2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    35. 

  35.  <LI><a href="#[45]">DMA1_Channel3_4_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    36. 

  36.  <LI><a href="#[7]">DebugMon_Handler</a> from gd32f10x_it.o(i.DebugMon_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    37. 

  37.  <LI><a href="#[3a]">EXMC_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    38. 

  38.  <LI><a href="#[10]">EXTI0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    39. 

  39.  <LI><a href="#[32]">EXTI10_15_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    40. 

  40.  <LI><a href="#[11]">EXTI1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    41. 

  41.  <LI><a href="#[12]">EXTI2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    42. 

  42.  <LI><a href="#[13]">EXTI3_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    43. 

  43.  <LI><a href="#[14]">EXTI4_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    44. 

  44.  <LI><a href="#[21]">EXTI5_9_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    45. 

  45.  <LI><a href="#[e]">FMC_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    46. 

  46.  <LI><a href="#[2]">HardFault_Handler</a> from gd32f10x_it.o(i.HardFault_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    47. 

  47.  <LI><a href="#[2a]">I2C0_ER_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    48. 

  48.  <LI><a href="#[29]">I2C0_EV_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    49. 

  49.  <LI><a href="#[2c]">I2C1_ER_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    50. 

  50.  <LI><a href="#[2b]">I2C1_EV_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    51. 

  51.  <LI><a href="#[b]">LVD_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    52. 

  52.  <LI><a href="#[3]">MemManage_Handler</a> from gd32f10x_it.o(i.MemManage_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    53. 

  53.  <LI><a href="#[1]">NMI_Handler</a> from gd32f10x_it.o(i.NMI_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    54. 

  54.  <LI><a href="#[8]">PendSV_Handler</a> from gd32f10x_it.o(i.PendSV_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    55. 

  55.  <LI><a href="#[f]">RCU_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    56. 

  56.  <LI><a href="#[33]">RTC_Alarm_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    57. 

  57.  <LI><a href="#[d]">RTC_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    58. 

  58.  <LI><a href="#[0]">Reset_Handler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    59. 

  59.  <LI><a href="#[3b]">SDIO_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    60. 

  60.  <LI><a href="#[2d]">SPI0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    61. 

  61.  <LI><a href="#[2e]">SPI1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    62. 

  62.  <LI><a href="#[3d]">SPI2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    63. 

  63.  <LI><a href="#[6]">SVC_Handler</a> from gd32f10x_it.o(i.SVC_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    64. 

  64.  <LI><a href="#[9]">SysTick_Handler</a> from gd32f10x_it.o(i.SysTick_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    65. 

  65.  <LI><a href="#[47]">SystemInit</a> from system_gd32f10x.o(i.SystemInit) referenced from startup_gd32f10x_xd.o(.text)
    66. 

  66.  <LI><a href="#[c]">TAMPER_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    67. 

  67.  <LI><a href="#[22]">TIMER0_BRK_TIMER8_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    68. 

  68.  <LI><a href="#[25]">TIMER0_Channel_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    69. 

  69.  <LI><a href="#[24]">TIMER0_TRG_CMT_TIMER10_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    70. 

  70.  <LI><a href="#[23]">TIMER0_UP_TIMER9_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    71. 

  71.  <LI><a href="#[26]">TIMER1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    72. 

  72.  <LI><a href="#[27]">TIMER2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    73. 

  73.  <LI><a href="#[28]">TIMER3_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    74. 

  74.  <LI><a href="#[3c]">TIMER4_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    75. 

  75.  <LI><a href="#[40]">TIMER5_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    76. 

  76.  <LI><a href="#[41]">TIMER6_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    77. 

  77.  <LI><a href="#[35]">TIMER7_BRK_TIMER11_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    78. 

  78.  <LI><a href="#[38]">TIMER7_Channel_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    79. 

  79.  <LI><a href="#[37]">TIMER7_TRG_CMT_TIMER13_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    80. 

  80.  <LI><a href="#[36]">TIMER7_UP_TIMER12_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    81. 

  81.  <LI><a href="#[3e]">UART3_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    82. 

  82.  <LI><a href="#[3f]">UART4_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    83. 

  83.  <LI><a href="#[2f]">USART0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    84. 

  84.  <LI><a href="#[30]">USART1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    85. 

  85.  <LI><a href="#[31]">USART2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    86. 

  86.  <LI><a href="#[1d]">USBD_HP_CAN0_TX_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    87. 

  87.  <LI><a href="#[1e]">USBD_LP_CAN0_RX0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    88. 

  88.  <LI><a href="#[34]">USBD_WKUP_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    89. 

  89.  <LI><a href="#[5]">UsageFault_Handler</a> from gd32f10x_it.o(i.UsageFault_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    90. 

  90.  <LI><a href="#[a]">WWDGT_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    91. 

  91.  <LI><a href="#[48]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_gd32f10x_xd.o(.text)
    92. 

  92.  <LI><a href="#[46]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
    93. 

  93. </UL>
    94. 

  94. <P>
    95. 

  95. <H3>
    96. 

  96. Global Symbols
    97. 

  97. </H3>
    98. 

  98. <P><STRONG><a name="[48]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
    99. 

  99. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(.text)
    100. 

  100. </UL>
    101. 

  101. <P><STRONG><a name="[7a]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))
    102. 

  102. 

  103. <P><STRONG><a name="[49]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    104. 

  104. <BR><BR>[Calls]<UL><LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    105. 

  105. </UL>
    106. 

  106. 

  107. <P><STRONG><a name="[4e]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    108. 

  108. <BR><BR>[Called By]<UL><LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    109. 

  109. </UL>
    110. 

  110. 

  111. <P><STRONG><a name="[7b]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))
    112. 

  112. 

  113. <P><STRONG><a name="[7c]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))
    114. 

  114. 

  115. <P><STRONG><a name="[7d]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))
    116. 

  116. 

  117. <P><STRONG><a name="[7e]"></a>__rt_lib_shutdown_fini</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry12b.o(.ARM.Collect$$$$0000000E))
    118. 

  118. 

  119. <P><STRONG><a name="[7f]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000F))
    120. 

  120. 

  121. <P><STRONG><a name="[80]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$00000011))
    122. 

  122. 

  123. <P><STRONG><a name="[63]"></a>MSR_SP</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, boot.o(.emb_text))
    124. 

  124. <BR><BR>[Called By]<UL><LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LOAD_A
    125. 

  125. </UL>
    126. 

  126. 

  127. <P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    128. 

  128. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    129. 

  129. </UL>
    130. 

  130. <P><STRONG><a name="[1c]"></a>ADC0_1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    131. 

  131. <BR><BR>[Calls]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC0_1_IRQHandler
    132. 

  132. </UL>
    133. 

  133. <BR>[Called By]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC0_1_IRQHandler
    134. 

  134. </UL>
    135. 

  135. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    136. 

  136. </UL>
    137. 

  137. <P><STRONG><a name="[39]"></a>ADC2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    138. 

  138. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    139. 

  139. </UL>
    140. 

  140. <P><STRONG><a name="[20]"></a>CAN0_EWMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    141. 

  141. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    142. 

  142. </UL>
    143. 

  143. <P><STRONG><a name="[1f]"></a>CAN0_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    144. 

  144. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    145. 

  145. </UL>
    146. 

  146. <P><STRONG><a name="[15]"></a>DMA0_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    147. 

  147. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    148. 

  148. </UL>
    149. 

  149. <P><STRONG><a name="[16]"></a>DMA0_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    150. 

  150. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    151. 

  151. </UL>
    152. 

  152. <P><STRONG><a name="[17]"></a>DMA0_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    153. 

  153. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    154. 

  154. </UL>
    155. 

  155. <P><STRONG><a name="[18]"></a>DMA0_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    156. 

  156. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    157. 

  157. </UL>
    158. 

  158. <P><STRONG><a name="[19]"></a>DMA0_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    159. 

  159. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    160. 

  160. </UL>
    161. 

  161. <P><STRONG><a name="[1a]"></a>DMA0_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    162. 

  162. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    163. 

  163. </UL>
    164. 

  164. <P><STRONG><a name="[1b]"></a>DMA0_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    165. 

  165. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    166. 

  166. </UL>
    167. 

  167. <P><STRONG><a name="[42]"></a>DMA1_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    168. 

  168. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    169. 

  169. </UL>
    170. 

  170. <P><STRONG><a name="[43]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    171. 

  171. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    172. 

  172. </UL>
    173. 

  173. <P><STRONG><a name="[44]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    174. 

  174. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    175. 

  175. </UL>
    176. 

  176. <P><STRONG><a name="[45]"></a>DMA1_Channel3_4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    177. 

  177. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    178. 

  178. </UL>
    179. 

  179. <P><STRONG><a name="[3a]"></a>EXMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    180. 

  180. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    181. 

  181. </UL>
    182. 

  182. <P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    183. 

  183. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    184. 

  184. </UL>
    185. 

  185. <P><STRONG><a name="[32]"></a>EXTI10_15_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    186. 

  186. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    187. 

  187. </UL>
    188. 

  188. <P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    189. 

  189. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    190. 

  190. </UL>
    191. 

  191. <P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    192. 

  192. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    193. 

  193. </UL>
    194. 

  194. <P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    195. 

  195. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    196. 

  196. </UL>
    197. 

  197. <P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    198. 

  198. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    199. 

  199. </UL>
    200. 

  200. <P><STRONG><a name="[21]"></a>EXTI5_9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    201. 

  201. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    202. 

  202. </UL>
    203. 

  203. <P><STRONG><a name="[e]"></a>FMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    204. 

  204. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    205. 

  205. </UL>
    206. 

  206. <P><STRONG><a name="[2a]"></a>I2C0_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    207. 

  207. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    208. 

  208. </UL>
    209. 

  209. <P><STRONG><a name="[29]"></a>I2C0_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    210. 

  210. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    211. 

  211. </UL>
    212. 

  212. <P><STRONG><a name="[2c]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    213. 

  213. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    214. 

  214. </UL>
    215. 

  215. <P><STRONG><a name="[2b]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    216. 

  216. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    217. 

  217. </UL>
    218. 

  218. <P><STRONG><a name="[b]"></a>LVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    219. 

  219. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    220. 

  220. </UL>
    221. 

  221. <P><STRONG><a name="[f]"></a>RCU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    222. 

  222. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    223. 

  223. </UL>
    224. 

  224. <P><STRONG><a name="[33]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    225. 

  225. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    226. 

  226. </UL>
    227. 

  227. <P><STRONG><a name="[d]"></a>RTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    228. 

  228. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    229. 

  229. </UL>
    230. 

  230. <P><STRONG><a name="[3b]"></a>SDIO_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    231. 

  231. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    232. 

  232. </UL>
    233. 

  233. <P><STRONG><a name="[2d]"></a>SPI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    234. 

  234. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    235. 

  235. </UL>
    236. 

  236. <P><STRONG><a name="[2e]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    237. 

  237. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    238. 

  238. </UL>
    239. 

  239. <P><STRONG><a name="[3d]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    240. 

  240. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    241. 

  241. </UL>
    242. 

  242. <P><STRONG><a name="[c]"></a>TAMPER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    243. 

  243. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    244. 

  244. </UL>
    245. 

  245. <P><STRONG><a name="[22]"></a>TIMER0_BRK_TIMER8_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    246. 

  246. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    247. 

  247. </UL>
    248. 

  248. <P><STRONG><a name="[25]"></a>TIMER0_Channel_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    249. 

  249. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    250. 

  250. </UL>
    251. 

  251. <P><STRONG><a name="[24]"></a>TIMER0_TRG_CMT_TIMER10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    252. 

  252. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    253. 

  253. </UL>
    254. 

  254. <P><STRONG><a name="[23]"></a>TIMER0_UP_TIMER9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    255. 

  255. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    256. 

  256. </UL>
    257. 

  257. <P><STRONG><a name="[26]"></a>TIMER1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    258. 

  258. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    259. 

  259. </UL>
    260. 

  260. <P><STRONG><a name="[27]"></a>TIMER2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    261. 

  261. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    262. 

  262. </UL>
    263. 

  263. <P><STRONG><a name="[28]"></a>TIMER3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    264. 

  264. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    265. 

  265. </UL>
    266. 

  266. <P><STRONG><a name="[3c]"></a>TIMER4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    267. 

  267. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    268. 

  268. </UL>
    269. 

  269. <P><STRONG><a name="[40]"></a>TIMER5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    270. 

  270. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    271. 

  271. </UL>
    272. 

  272. <P><STRONG><a name="[41]"></a>TIMER6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    273. 

  273. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    274. 

  274. </UL>
    275. 

  275. <P><STRONG><a name="[35]"></a>TIMER7_BRK_TIMER11_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    276. 

  276. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    277. 

  277. </UL>
    278. 

  278. <P><STRONG><a name="[38]"></a>TIMER7_Channel_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    279. 

  279. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    280. 

  280. </UL>
    281. 

  281. <P><STRONG><a name="[37]"></a>TIMER7_TRG_CMT_TIMER13_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    282. 

  282. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    283. 

  283. </UL>
    284. 

  284. <P><STRONG><a name="[36]"></a>TIMER7_UP_TIMER12_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    285. 

  285. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    286. 

  286. </UL>
    287. 

  287. <P><STRONG><a name="[3e]"></a>UART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    288. 

  288. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    289. 

  289. </UL>
    290. 

  290. <P><STRONG><a name="[3f]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    291. 

  291. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    292. 

  292. </UL>
    293. 

  293. <P><STRONG><a name="[2f]"></a>USART0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    294. 

  294. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    295. 

  295. </UL>
    296. 

  296. <P><STRONG><a name="[30]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    297. 

  297. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    298. 

  298. </UL>
    299. 

  299. <P><STRONG><a name="[31]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    300. 

  300. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    301. 

  301. </UL>
    302. 

  302. <P><STRONG><a name="[1d]"></a>USBD_HP_CAN0_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    303. 

  303. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    304. 

  304. </UL>
    305. 

  305. <P><STRONG><a name="[1e]"></a>USBD_LP_CAN0_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    306. 

  306. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    307. 

  307. </UL>
    308. 

  308. <P><STRONG><a name="[34]"></a>USBD_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    309. 

  309. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    310. 

  310. </UL>
    311. 

  311. <P><STRONG><a name="[a]"></a>WWDGT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    312. 

  312. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    313. 

  313. </UL>
    314. 

  314. <P><STRONG><a name="[4c]"></a>__aeabi_memset</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    315. 

  315. <BR><BR>[Called By]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_memset$wrapper
    316. 

  316. <LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
    317. 

  317. </UL>
    318. 

  318. 

  319. <P><STRONG><a name="[81]"></a>__aeabi_memset4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    320. 

  320. 

  321. <P><STRONG><a name="[82]"></a>__aeabi_memset8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    322. 

  322. 

  323. <P><STRONG><a name="[4b]"></a>__aeabi_memclr</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    324. 

  324. <BR><BR>[Calls]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
    325. 

  325. </UL>
    326. 

  326. 

  327. <P><STRONG><a name="[52]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text))
    328. 

  328. <BR><BR>[Called By]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    329. 

  329. </UL>
    330. 

  330. 

  331. <P><STRONG><a name="[83]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    332. 

  332. 

  333. <P><STRONG><a name="[4d]"></a>_memset$wrapper</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, memseta.o(.text), UNUSED)
    334. 

  334. <BR><BR>[Calls]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
    335. 

  335. </UL>
    336. 

  336. 

  337. <P><STRONG><a name="[4a]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
    338. 

  338. <BR><BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
    339. 

  339. </UL>
    340. 

  340. <BR>[Called By]<UL><LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
    341. 

  341. </UL>
    342. 

  342. 

  343. <P><STRONG><a name="[84]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)
    344. 

  344. 

  345. <P><STRONG><a name="[4f]"></a>BootLoader_Brance</STRONG> (Thumb, 136 bytes, Stack size 2064 bytes, boot.o(i.BootLoader_Brance))
    346. 

  346. <BR><BR>[Stack]<UL><LI>Max Depth = 2172<LI>Call Chain = BootLoader_Brance &rArr; FLASH_Write &rArr; FLASH_WriteNotErase &rArr; fmc_halfword_program &rArr; fmc_bank1_ready_wait
    347. 

  347. </UL>
    348. 

  348. <BR>[Calls]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_fwdgt_reload
    349. 

  349. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;clear_ota_message_config_block
    350. 

  350. <LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_EraseFlash
    351. 

  351. <LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Write
    352. 

  352. <LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Read
    353. 

  353. <LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LOAD_A
    354. 

  354. <LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    355. 

  355. </UL>
    356. 

  356. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    357. 

  357. </UL>
    358. 

  358. 

  359. <P><STRONG><a name="[57]"></a>BootLoader_Clear</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, boot.o(i.BootLoader_Clear))
    360. 

  360. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = BootLoader_Clear &rArr; gpio_deinit
    361. 

  361. </UL>
    362. 

  362. <BR>[Calls]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_deinit
    363. 

  363. </UL>
    364. 

  364. <BR>[Called By]<UL><LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LOAD_A
    365. 

  365. </UL>
    366. 

  366. 

  367. <P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_it.o(i.BusFault_Handler))
    368. 

  368. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    369. 

  369. </UL>
    370. 

  370. <P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f10x_it.o(i.DebugMon_Handler))
    371. 

  371. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    372. 

  372. </UL>
    373. 

  373. <P><STRONG><a name="[59]"></a>Delay_Init</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, delay.o(i.Delay_Init))
    374. 

  374. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = Delay_Init
    375. 

  375. </UL>
    376. 

  376. <BR>[Calls]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;systick_clksource_set
    377. 

  377. </UL>
    378. 

  378. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    379. 

  379. </UL>
    380. 

  380. 

  381. <P><STRONG><a name="[5b]"></a>Delay_Ms</STRONG> (Thumb, 26 bytes, Stack size 4 bytes, delay.o(i.Delay_Ms))
    382. 

  382. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = Delay_Ms
    383. 

  383. </UL>
    384. 

  384. <BR>[Calls]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Us
    385. 

  385. </UL>
    386. 

  386. <BR>[Called By]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_test
    387. 

  387. </UL>
    388. 

  388. 

  389. <P><STRONG><a name="[5c]"></a>Delay_Us</STRONG> (Thumb, 58 bytes, Stack size 0 bytes, delay.o(i.Delay_Us))
    390. 

  390. <BR><BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Ms
    391. 

  391. </UL>
    392. 

  392. 

  393. <P><STRONG><a name="[5d]"></a>FLASH_ErasePage</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, fmc.o(i.FLASH_ErasePage))
    394. 

  394. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = FLASH_ErasePage &rArr; fmc_page_erase &rArr; fmc_bank1_ready_wait
    395. 

  395. </UL>
    396. 

  396. <BR>[Calls]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_page_erase
    397. 

  397. </UL>
    398. 

  398. <BR>[Called By]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Write
    399. 

  399. </UL>
    400. 

  400. 

  401. <P><STRONG><a name="[53]"></a>FLASH_Read</STRONG> (Thumb, 80 bytes, Stack size 16 bytes, fmc.o(i.FLASH_Read))
    402. 

  402. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = FLASH_Read
    403. 

  403. </UL>
    404. 

  404. <BR>[Called By]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;load_ota_message_config_params
    405. 

  405. <LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Write
    406. 

  406. <LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    407. 

  407. </UL>
    408. 

  408. 

  409. <P><STRONG><a name="[54]"></a>FLASH_Write</STRONG> (Thumb, 326 bytes, Stack size 64 bytes, fmc.o(i.FLASH_Write))
    410. 

  410. <BR><BR>[Stack]<UL><LI>Max Depth = 108<LI>Call Chain = FLASH_Write &rArr; FLASH_WriteNotErase &rArr; fmc_halfword_program &rArr; fmc_bank1_ready_wait
    411. 

  411. </UL>
    412. 

  412. <BR>[Calls]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_unlock
    413. 

  413. <LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_lock
    414. 

  414. <LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_WriteNotErase
    415. 

  415. <LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_ErasePage
    416. 

  416. <LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Read
    417. 

  417. </UL>
    418. 

  418. <BR>[Called By]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    419. 

  419. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_test
    420. 

  420. </UL>
    421. 

  421. 

  422. <P><STRONG><a name="[60]"></a>FLASH_WriteNotErase</STRONG> (Thumb, 60 bytes, Stack size 24 bytes, fmc.o(i.FLASH_WriteNotErase))
    423. 

  423. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = FLASH_WriteNotErase &rArr; fmc_halfword_program &rArr; fmc_bank1_ready_wait
    424. 

  424. </UL>
    425. 

  425. <BR>[Calls]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_halfword_program
    426. 

  426. </UL>
    427. 

  427. <BR>[Called By]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Write
    428. 

  428. </UL>
    429. 

  429. 

  430. <P><STRONG><a name="[50]"></a>GD32_EraseFlash</STRONG> (Thumb, 208 bytes, Stack size 24 bytes, fmc.o(i.GD32_EraseFlash))
    431. 

  431. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = GD32_EraseFlash &rArr; fmc_page_erase &rArr; fmc_bank1_ready_wait
    432. 

  432. </UL>
    433. 

  433. <BR>[Calls]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_unlock
    434. 

  434. <LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_page_erase
    435. 

  435. <LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_lock
    436. 

  436. </UL>
    437. 

  437. <BR>[Called By]<UL><LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;clear_ota_message_config_block
    438. 

  438. <LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    439. 

  439. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_test
    440. 

  440. </UL>
    441. 

  441. 

  442. <P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_it.o(i.HardFault_Handler))
    443. 

  443. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    444. 

  444. </UL>
    445. 

  445. <P><STRONG><a name="[56]"></a>LOAD_A</STRONG> (Thumb, 44 bytes, Stack size 8 bytes, boot.o(i.LOAD_A))
    446. 

  446. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = LOAD_A &rArr; BootLoader_Clear &rArr; gpio_deinit
    447. 

  447. </UL>
    448. 

  448. <BR>[Calls]<UL><LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Clear
    449. 

  449. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MSR_SP
    450. 

  450. </UL>
    451. 

  451. <BR>[Called By]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    452. 

  452. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    453. 

  453. </UL>
    454. 

  454. 

  455. <P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_it.o(i.MemManage_Handler))
    456. 

  456. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    457. 

  457. </UL>
    458. 

  458. <P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f10x_it.o(i.NMI_Handler))
    459. 

  459. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    460. 

  460. </UL>
    461. 

  461. <P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f10x_it.o(i.PendSV_Handler))
    462. 

  462. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    463. 

  463. </UL>
    464. 

  464. <P><STRONG><a name="[64]"></a>SPI0_Init</STRONG> (Thumb, 94 bytes, Stack size 32 bytes, spi.o(i.SPI0_Init))
    465. 

  465. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = SPI0_Init &rArr; gpio_init
    466. 

  466. </UL>
    467. 

  467. <BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;spi_init
    468. 

  468. <LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;spi_i2s_deinit
    469. 

  469. <LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;spi_enable
    470. 

  470. <LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    471. 

  471. <LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_init
    472. 

  472. </UL>
    473. 

  473. <BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W25Q32_Init
    474. 

  474. </UL>
    475. 

  475. 

  476. <P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f10x_it.o(i.SVC_Handler))
    477. 

  477. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    478. 

  478. </UL>
    479. 

  479. <P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f10x_it.o(i.SysTick_Handler))
    480. 

  480. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    481. 

  481. </UL>
    482. 

  482. <P><STRONG><a name="[47]"></a>SystemInit</STRONG> (Thumb, 196 bytes, Stack size 8 bytes, system_gd32f10x.o(i.SystemInit))
    483. 

  483. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SystemInit &rArr; system_clock_config
    484. 

  484. </UL>
    485. 

  485. <BR>[Calls]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_vector_table_set
    486. 

  486. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_config
    487. 

  487. </UL>
    488. 

  488. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(.text)
    489. 

  489. </UL>
    490. 

  490. <P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_it.o(i.UsageFault_Handler))
    491. 

  491. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    492. 

  492. </UL>
    493. 

  493. <P><STRONG><a name="[6c]"></a>W25Q32_Init</STRONG> (Thumb, 36 bytes, Stack size 8 bytes, w25q32.o(i.W25Q32_Init))
    494. 

  494. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = W25Q32_Init &rArr; SPI0_Init &rArr; gpio_init
    495. 

  495. </UL>
    496. 

  496. <BR>[Calls]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_set
    497. 

  497. <LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    498. 

  498. <LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_init
    499. 

  499. <LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_Init
    500. 

  500. </UL>
    501. 

  501. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    502. 

  502. </UL>
    503. 

  503. 

  504. <P><STRONG><a name="[85]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)
    505. 

  505. 

  506. <P><STRONG><a name="[86]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)
    507. 

  507. 

  508. <P><STRONG><a name="[87]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)
    509. 

  509. 

  510. <P><STRONG><a name="[55]"></a>clear_ota_message_config_block</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, ota_message.o(i.clear_ota_message_config_block))
    511. 

  511. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = clear_ota_message_config_block &rArr; GD32_EraseFlash &rArr; fmc_page_erase &rArr; fmc_bank1_ready_wait
    512. 

  512. </UL>
    513. 

  513. <BR>[Calls]<UL><LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_EraseFlash
    514. 

  514. </UL>
    515. 

  515. <BR>[Called By]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    516. 

  516. </UL>
    517. 

  517. 

  518. <P><STRONG><a name="[6e]"></a>fmc_bank0_ready_wait</STRONG> (Thumb, 34 bytes, Stack size 4 bytes, gd32f10x_fmc.o(i.fmc_bank0_ready_wait))
    519. 

  519. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = fmc_bank0_ready_wait
    520. 

  520. </UL>
    521. 

  521. <BR>[Calls]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_state_get
    522. 

  522. </UL>
    523. 

  523. <BR>[Called By]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_page_erase
    524. 

  524. <LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_halfword_program
    525. 

  525. </UL>
    526. 

  526. 

  527. <P><STRONG><a name="[6f]"></a>fmc_bank0_state_get</STRONG> (Thumb, 44 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_bank0_state_get))
    528. 

  528. <BR><BR>[Called By]<UL><LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_ready_wait
    529. 

  529. </UL>
    530. 

  530. 

  531. <P><STRONG><a name="[70]"></a>fmc_bank1_ready_wait</STRONG> (Thumb, 34 bytes, Stack size 4 bytes, gd32f10x_fmc.o(i.fmc_bank1_ready_wait))
    532. 

  532. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = fmc_bank1_ready_wait
    533. 

  533. </UL>
    534. 

  534. <BR>[Calls]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_state_get
    535. 

  535. </UL>
    536. 

  536. <BR>[Called By]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_page_erase
    537. 

  537. <LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_halfword_program
    538. 

  538. </UL>
    539. 

  539. 

  540. <P><STRONG><a name="[71]"></a>fmc_bank1_state_get</STRONG> (Thumb, 44 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_bank1_state_get))
    541. 

  541. <BR><BR>[Called By]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_ready_wait
    542. 

  542. </UL>
    543. 

  543. 

  544. <P><STRONG><a name="[62]"></a>fmc_halfword_program</STRONG> (Thumb, 178 bytes, Stack size 16 bytes, gd32f10x_fmc.o(i.fmc_halfword_program))
    545. 

  545. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = fmc_halfword_program &rArr; fmc_bank1_ready_wait
    546. 

  546. </UL>
    547. 

  547. <BR>[Calls]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_ready_wait
    548. 

  548. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_ready_wait
    549. 

  549. </UL>
    550. 

  550. <BR>[Called By]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_WriteNotErase
    551. 

  551. </UL>
    552. 

  552. 

  553. <P><STRONG><a name="[61]"></a>fmc_lock</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_lock))
    554. 

  554. <BR><BR>[Called By]<UL><LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_EraseFlash
    555. 

  555. <LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Write
    556. 

  556. </UL>
    557. 

  557. 

  558. <P><STRONG><a name="[5e]"></a>fmc_page_erase</STRONG> (Thumb, 222 bytes, Stack size 12 bytes, gd32f10x_fmc.o(i.fmc_page_erase))
    559. 

  559. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = fmc_page_erase &rArr; fmc_bank1_ready_wait
    560. 

  560. </UL>
    561. 

  561. <BR>[Calls]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_ready_wait
    562. 

  562. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_ready_wait
    563. 

  563. </UL>
    564. 

  564. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_ErasePage
    565. 

  565. <LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_EraseFlash
    566. 

  566. </UL>
    567. 

  567. 

  568. <P><STRONG><a name="[5f]"></a>fmc_unlock</STRONG> (Thumb, 52 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_unlock))
    569. 

  569. <BR><BR>[Called By]<UL><LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_EraseFlash
    570. 

  570. <LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Write
    571. 

  571. </UL>
    572. 

  572. 

  573. <P><STRONG><a name="[79]"></a>fwdgt_counter_reload</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_fwdgt.o(i.fwdgt_counter_reload))
    574. 

  574. <BR><BR>[Called By]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_fwdgt_reload
    575. 

  575. </UL>
    576. 

  576. 

  577. <P><STRONG><a name="[78]"></a>fwdgt_write_enable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_fwdgt.o(i.fwdgt_write_enable))
    578. 

  578. <BR><BR>[Called By]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_fwdgt_reload
    579. 

  579. </UL>
    580. 

  580. 

  581. <P><STRONG><a name="[76]"></a>get_config_params</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, ota_message.o(i.get_config_params))
    582. 

  582. <BR><BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    583. 

  583. </UL>
    584. 

  584. 

  585. <P><STRONG><a name="[6d]"></a>gpio_bit_set</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_gpio.o(i.gpio_bit_set))
    586. 

  586. <BR><BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W25Q32_Init
    587. 

  587. </UL>
    588. 

  588. 

  589. <P><STRONG><a name="[58]"></a>gpio_deinit</STRONG> (Thumb, 186 bytes, Stack size 8 bytes, gd32f10x_gpio.o(i.gpio_deinit))
    590. 

  590. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = gpio_deinit
    591. 

  591. </UL>
    592. 

  592. <BR>[Calls]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_enable
    593. 

  593. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_disable
    594. 

  594. </UL>
    595. 

  595. <BR>[Called By]<UL><LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Clear
    596. 

  596. </UL>
    597. 

  597. 

  598. <P><STRONG><a name="[66]"></a>gpio_init</STRONG> (Thumb, 172 bytes, Stack size 20 bytes, gd32f10x_gpio.o(i.gpio_init))
    599. 

  599. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = gpio_init
    600. 

  600. </UL>
    601. 

  601. <BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W25Q32_Init
    602. 

  602. <LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_Init
    603. 

  603. </UL>
    604. 

  604. 

  605. <P><STRONG><a name="[74]"></a>load_ota_message_config_params</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, ota_message.o(i.load_ota_message_config_params))
    606. 

  606. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = load_ota_message_config_params &rArr; FLASH_Read
    607. 

  607. </UL>
    608. 

  608. <BR>[Calls]<UL><LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Read
    609. 

  609. </UL>
    610. 

  610. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    611. 

  611. </UL>
    612. 

  612. 

  613. <P><STRONG><a name="[46]"></a>main</STRONG> (Thumb, 46 bytes, Stack size 0 bytes, main.o(i.main))
    614. 

  614. <BR><BR>[Stack]<UL><LI>Max Depth = 2172<LI>Call Chain = main &rArr; BootLoader_Brance &rArr; FLASH_Write &rArr; FLASH_WriteNotErase &rArr; fmc_halfword_program &rArr; fmc_bank1_ready_wait
    615. 

  615. </UL>
    616. 

  616. <BR>[Calls]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;load_ota_message_config_params
    617. 

  617. <LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_config_params
    618. 

  618. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W25Q32_Init
    619. 

  619. <LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Init
    620. 

  620. <LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_fwdgt_reload
    621. 

  621. <LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LOAD_A
    622. 

  622. <LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    623. 

  623. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_test
    624. 

  624. </UL>
    625. 

  625. <BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
    626. 

  626. </UL>
    627. 

  627. <P><STRONG><a name="[75]"></a>my_test</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, main.o(i.my_test))
    628. 

  628. <BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = my_test &rArr; FLASH_Write &rArr; FLASH_WriteNotErase &rArr; fmc_halfword_program &rArr; fmc_bank1_ready_wait
    629. 

  629. </UL>
    630. 

  630. <BR>[Calls]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Ms
    631. 

  631. <LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_EraseFlash
    632. 

  632. <LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Write
    633. 

  633. </UL>
    634. 

  634. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    635. 

  635. </UL>
    636. 

  636. 

  637. <P><STRONG><a name="[6b]"></a>nvic_vector_table_set</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_misc.o(i.nvic_vector_table_set))
    638. 

  638. <BR><BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
    639. 

  639. </UL>
    640. 

  640. 

  641. <P><STRONG><a name="[65]"></a>rcu_periph_clock_enable</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_rcu.o(i.rcu_periph_clock_enable))
    642. 

  642. <BR><BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W25Q32_Init
    643. 

  643. <LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_Init
    644. 

  644. </UL>
    645. 

  645. 

  646. <P><STRONG><a name="[73]"></a>rcu_periph_reset_disable</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_rcu.o(i.rcu_periph_reset_disable))
    647. 

  647. <BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;spi_i2s_deinit
    648. 

  648. <LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_deinit
    649. 

  649. </UL>
    650. 

  650. 

  651. <P><STRONG><a name="[72]"></a>rcu_periph_reset_enable</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_rcu.o(i.rcu_periph_reset_enable))
    652. 

  652. <BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;spi_i2s_deinit
    653. 

  653. <LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_deinit
    654. 

  654. </UL>
    655. 

  655. 

  656. <P><STRONG><a name="[69]"></a>spi_enable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_spi.o(i.spi_enable))
    657. 

  657. <BR><BR>[Called By]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_Init
    658. 

  658. </UL>
    659. 

  659. 

  660. <P><STRONG><a name="[67]"></a>spi_i2s_deinit</STRONG> (Thumb, 82 bytes, Stack size 8 bytes, gd32f10x_spi.o(i.spi_i2s_deinit))
    661. 

  661. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = spi_i2s_deinit
    662. 

  662. </UL>
    663. 

  663. <BR>[Calls]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_enable
    664. 

  664. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_disable
    665. 

  665. </UL>
    666. 

  666. <BR>[Called By]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_Init
    667. 

  667. </UL>
    668. 

  668. 

  669. <P><STRONG><a name="[68]"></a>spi_init</STRONG> (Thumb, 50 bytes, Stack size 0 bytes, gd32f10x_spi.o(i.spi_init))
    670. 

  670. <BR><BR>[Called By]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_Init
    671. 

  671. </UL>
    672. 

  672. 

  673. <P><STRONG><a name="[5a]"></a>systick_clksource_set</STRONG> (Thumb, 40 bytes, Stack size 0 bytes, gd32f10x_misc.o(i.systick_clksource_set))
    674. 

  674. <BR><BR>[Called By]<UL><LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Init
    675. 

  675. </UL>
    676. 

  676. 

  677. <P><STRONG><a name="[51]"></a>task_fwdgt_reload</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, main.o(i.task_fwdgt_reload))
    678. 

  678. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = task_fwdgt_reload
    679. 

  679. </UL>
    680. 

  680. <BR>[Calls]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fwdgt_write_enable
    681. 

  681. <LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fwdgt_counter_reload
    682. 

  682. </UL>
    683. 

  683. <BR>[Called By]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    684. 

  684. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    685. 

  685. </UL>
    686. 

  686. <P>
    687. 

  687. <H3>
    688. 

  688. Local Symbols
    689. 

  689. </H3>
    690. 

  690. <P><STRONG><a name="[77]"></a>system_clock_108m_hxtal</STRONG> (Thumb, 182 bytes, Stack size 0 bytes, system_gd32f10x.o(i.system_clock_108m_hxtal))
    691. 

  691. <BR><BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_config
    692. 

  692. </UL>
    693. 

  693. 

  694. <P><STRONG><a name="[6a]"></a>system_clock_config</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, system_gd32f10x.o(i.system_clock_config))
    695. 

  695. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = system_clock_config
    696. 

  696. </UL>
    697. 

  697. <BR>[Calls]<UL><LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_108m_hxtal
    698. 

  698. </UL>
    699. 

  699. <BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
    700. 

  700. </UL>
    701. 

  701. <P>
    702. 

  702. <H3>
    703. 

  703. Undefined Global Symbols
    704. 

  704. </H3><HR></body></html>
    705.