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  1. <!doctype html public "-//w3c//dtd html 4.0 transitional//en">
    2. 

  2. <html><head>
    3. 

  3. <title>Static Call Graph - [..\OBJ\bootloader.axf]</title></head>
    4. 

  4. <body><HR>
    5. 

  5. <H1>Static Call Graph for image ..\OBJ\bootloader.axf</H1><HR>
    6. 

  6. <BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060960: Last Updated: Mon Oct 30 16:41:13 2023
    7. 

  7. <BR><P>
    8. 

  8. <H3>Maximum Stack Usage =       1088 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
    9. 

  9. Call chain for Maximum Stack Depth:</H3>
    10. 

  10. main &rArr; BootLoader_Brance &rArr; W25Q32_Read &rArr; SPI0_Write &rArr; SPI0_ReadWriteByte
    11. 

  11. <P>
    12. 

  12. <H3>
    13. 

  13. Mutually Recursive functions
    14. 

  14. </H3> <LI><a href="#[1c]">ADC0_1_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1c]">ADC0_1_IRQHandler</a><BR>
    15. 

  15. </UL>
    16. 

  16. <P>
    17. 

  17. <H3>
    18. 

  18. Function Pointers
    19. 

  19. </H3><UL>
    20. 

  20.  <LI><a href="#[1c]">ADC0_1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    21. 

  21.  <LI><a href="#[39]">ADC2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    22. 

  22.  <LI><a href="#[4]">BusFault_Handler</a> from gd32f10x_it.o(i.BusFault_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    23. 

  23.  <LI><a href="#[20]">CAN0_EWMC_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    24. 

  24.  <LI><a href="#[1f]">CAN0_RX1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    25. 

  25.  <LI><a href="#[15]">DMA0_Channel0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    26. 

  26.  <LI><a href="#[16]">DMA0_Channel1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    27. 

  27.  <LI><a href="#[17]">DMA0_Channel2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    28. 

  28.  <LI><a href="#[18]">DMA0_Channel3_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    29. 

  29.  <LI><a href="#[19]">DMA0_Channel4_IRQHandler</a> from gd32f10x_it.o(i.DMA0_Channel4_IRQHandler) referenced from startup_gd32f10x_xd.o(RESET)
    30. 

  30.  <LI><a href="#[1a]">DMA0_Channel5_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    31. 

  31.  <LI><a href="#[1b]">DMA0_Channel6_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    32. 

  32.  <LI><a href="#[42]">DMA1_Channel0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    33. 

  33.  <LI><a href="#[43]">DMA1_Channel1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    34. 

  34.  <LI><a href="#[44]">DMA1_Channel2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    35. 

  35.  <LI><a href="#[45]">DMA1_Channel3_4_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    36. 

  36.  <LI><a href="#[7]">DebugMon_Handler</a> from gd32f10x_it.o(i.DebugMon_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    37. 

  37.  <LI><a href="#[3a]">EXMC_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    38. 

  38.  <LI><a href="#[10]">EXTI0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    39. 

  39.  <LI><a href="#[32]">EXTI10_15_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    40. 

  40.  <LI><a href="#[11]">EXTI1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    41. 

  41.  <LI><a href="#[12]">EXTI2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    42. 

  42.  <LI><a href="#[13]">EXTI3_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    43. 

  43.  <LI><a href="#[14]">EXTI4_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    44. 

  44.  <LI><a href="#[21]">EXTI5_9_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    45. 

  45.  <LI><a href="#[e]">FMC_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    46. 

  46.  <LI><a href="#[2]">HardFault_Handler</a> from gd32f10x_it.o(i.HardFault_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    47. 

  47.  <LI><a href="#[2a]">I2C0_ER_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    48. 

  48.  <LI><a href="#[29]">I2C0_EV_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    49. 

  49.  <LI><a href="#[2c]">I2C1_ER_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    50. 

  50.  <LI><a href="#[2b]">I2C1_EV_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    51. 

  51.  <LI><a href="#[b]">LVD_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    52. 

  52.  <LI><a href="#[3]">MemManage_Handler</a> from gd32f10x_it.o(i.MemManage_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    53. 

  53.  <LI><a href="#[1]">NMI_Handler</a> from gd32f10x_it.o(i.NMI_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    54. 

  54.  <LI><a href="#[8]">PendSV_Handler</a> from gd32f10x_it.o(i.PendSV_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    55. 

  55.  <LI><a href="#[f]">RCU_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    56. 

  56.  <LI><a href="#[33]">RTC_Alarm_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    57. 

  57.  <LI><a href="#[d]">RTC_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    58. 

  58.  <LI><a href="#[0]">Reset_Handler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    59. 

  59.  <LI><a href="#[3b]">SDIO_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    60. 

  60.  <LI><a href="#[2d]">SPI0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    61. 

  61.  <LI><a href="#[2e]">SPI1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    62. 

  62.  <LI><a href="#[3d]">SPI2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    63. 

  63.  <LI><a href="#[6]">SVC_Handler</a> from gd32f10x_it.o(i.SVC_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    64. 

  64.  <LI><a href="#[9]">SysTick_Handler</a> from gd32f10x_it.o(i.SysTick_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    65. 

  65.  <LI><a href="#[47]">SystemInit</a> from system_gd32f10x.o(i.SystemInit) referenced from startup_gd32f10x_xd.o(.text)
    66. 

  66.  <LI><a href="#[c]">TAMPER_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    67. 

  67.  <LI><a href="#[22]">TIMER0_BRK_TIMER8_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    68. 

  68.  <LI><a href="#[25]">TIMER0_Channel_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    69. 

  69.  <LI><a href="#[24]">TIMER0_TRG_CMT_TIMER10_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    70. 

  70.  <LI><a href="#[23]">TIMER0_UP_TIMER9_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    71. 

  71.  <LI><a href="#[26]">TIMER1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    72. 

  72.  <LI><a href="#[27]">TIMER2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    73. 

  73.  <LI><a href="#[28]">TIMER3_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    74. 

  74.  <LI><a href="#[3c]">TIMER4_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    75. 

  75.  <LI><a href="#[40]">TIMER5_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    76. 

  76.  <LI><a href="#[41]">TIMER6_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    77. 

  77.  <LI><a href="#[35]">TIMER7_BRK_TIMER11_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    78. 

  78.  <LI><a href="#[38]">TIMER7_Channel_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    79. 

  79.  <LI><a href="#[37]">TIMER7_TRG_CMT_TIMER13_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    80. 

  80.  <LI><a href="#[36]">TIMER7_UP_TIMER12_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    81. 

  81.  <LI><a href="#[3e]">UART3_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    82. 

  82.  <LI><a href="#[3f]">UART4_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    83. 

  83.  <LI><a href="#[2f]">USART0_IRQHandler</a> from gd32f10x_it.o(i.USART0_IRQHandler) referenced from startup_gd32f10x_xd.o(RESET)
    84. 

  84.  <LI><a href="#[30]">USART1_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    85. 

  85.  <LI><a href="#[31]">USART2_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    86. 

  86.  <LI><a href="#[1d]">USBD_HP_CAN0_TX_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    87. 

  87.  <LI><a href="#[1e]">USBD_LP_CAN0_RX0_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    88. 

  88.  <LI><a href="#[34]">USBD_WKUP_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    89. 

  89.  <LI><a href="#[5]">UsageFault_Handler</a> from gd32f10x_it.o(i.UsageFault_Handler) referenced from startup_gd32f10x_xd.o(RESET)
    90. 

  90.  <LI><a href="#[a]">WWDGT_IRQHandler</a> from startup_gd32f10x_xd.o(.text) referenced from startup_gd32f10x_xd.o(RESET)
    91. 

  91.  <LI><a href="#[48]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_gd32f10x_xd.o(.text)
    92. 

  92.  <LI><a href="#[4a]">_sbackspace</a> from _sgetc.o(.text) referenced from __0sscanf.o(.text)
    93. 

  93.  <LI><a href="#[4b]">_scanf_char_input</a> from scanf_char.o(.text) referenced from scanf_char.o(.text)
    94. 

  94.  <LI><a href="#[49]">_sgetc</a> from _sgetc.o(.text) referenced from __0sscanf.o(.text)
    95. 

  95.  <LI><a href="#[4c]">isspace</a> from isspace_c.o(.text) referenced from scanf_char.o(.text)
    96. 

  96.  <LI><a href="#[46]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
    97. 

  97. </UL>
    98. 

  98. <P>
    99. 

  99. <H3>
    100. 

  100. Global Symbols
    101. 

  101. </H3>
    102. 

  102. <P><STRONG><a name="[48]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
    103. 

  103. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(.text)
    104. 

  104. </UL>
    105. 

  105. <P><STRONG><a name="[bc]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))
    106. 

  106. 

  107. <P><STRONG><a name="[4d]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    108. 

  108. <BR><BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    109. 

  109. </UL>
    110. 

  110. 

  111. <P><STRONG><a name="[57]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    112. 

  112. <BR><BR>[Called By]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    113. 

  113. </UL>
    114. 

  114. 

  115. <P><STRONG><a name="[bd]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))
    116. 

  116. 

  117. <P><STRONG><a name="[be]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))
    118. 

  118. 

  119. <P><STRONG><a name="[bf]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))
    120. 

  120. 

  121. <P><STRONG><a name="[c0]"></a>__rt_lib_shutdown_fini</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry12b.o(.ARM.Collect$$$$0000000E))
    122. 

  122. 

  123. <P><STRONG><a name="[c1]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000F))
    124. 

  124. 

  125. <P><STRONG><a name="[c2]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$00000011))
    126. 

  126. 

  127. <P><STRONG><a name="[7a]"></a>MSR_SP</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, boot.o(.emb_text))
    128. 

  128. <BR><BR>[Called By]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LOAD_A
    129. 

  129. </UL>
    130. 

  130. 

  131. <P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    132. 

  132. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    133. 

  133. </UL>
    134. 

  134. <P><STRONG><a name="[1c]"></a>ADC0_1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    135. 

  135. <BR><BR>[Calls]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC0_1_IRQHandler
    136. 

  136. </UL>
    137. 

  137. <BR>[Called By]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC0_1_IRQHandler
    138. 

  138. </UL>
    139. 

  139. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    140. 

  140. </UL>
    141. 

  141. <P><STRONG><a name="[39]"></a>ADC2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    142. 

  142. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    143. 

  143. </UL>
    144. 

  144. <P><STRONG><a name="[20]"></a>CAN0_EWMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    145. 

  145. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    146. 

  146. </UL>
    147. 

  147. <P><STRONG><a name="[1f]"></a>CAN0_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    148. 

  148. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    149. 

  149. </UL>
    150. 

  150. <P><STRONG><a name="[15]"></a>DMA0_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    151. 

  151. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    152. 

  152. </UL>
    153. 

  153. <P><STRONG><a name="[16]"></a>DMA0_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    154. 

  154. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    155. 

  155. </UL>
    156. 

  156. <P><STRONG><a name="[17]"></a>DMA0_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    157. 

  157. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    158. 

  158. </UL>
    159. 

  159. <P><STRONG><a name="[18]"></a>DMA0_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    160. 

  160. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    161. 

  161. </UL>
    162. 

  162. <P><STRONG><a name="[1a]"></a>DMA0_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    163. 

  163. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    164. 

  164. </UL>
    165. 

  165. <P><STRONG><a name="[1b]"></a>DMA0_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    166. 

  166. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    167. 

  167. </UL>
    168. 

  168. <P><STRONG><a name="[42]"></a>DMA1_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    169. 

  169. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    170. 

  170. </UL>
    171. 

  171. <P><STRONG><a name="[43]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    172. 

  172. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    173. 

  173. </UL>
    174. 

  174. <P><STRONG><a name="[44]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    175. 

  175. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    176. 

  176. </UL>
    177. 

  177. <P><STRONG><a name="[45]"></a>DMA1_Channel3_4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    178. 

  178. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    179. 

  179. </UL>
    180. 

  180. <P><STRONG><a name="[3a]"></a>EXMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    181. 

  181. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    182. 

  182. </UL>
    183. 

  183. <P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    184. 

  184. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    185. 

  185. </UL>
    186. 

  186. <P><STRONG><a name="[32]"></a>EXTI10_15_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    187. 

  187. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    188. 

  188. </UL>
    189. 

  189. <P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    190. 

  190. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    191. 

  191. </UL>
    192. 

  192. <P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    193. 

  193. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    194. 

  194. </UL>
    195. 

  195. <P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    196. 

  196. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    197. 

  197. </UL>
    198. 

  198. <P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    199. 

  199. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    200. 

  200. </UL>
    201. 

  201. <P><STRONG><a name="[21]"></a>EXTI5_9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    202. 

  202. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    203. 

  203. </UL>
    204. 

  204. <P><STRONG><a name="[e]"></a>FMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    205. 

  205. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    206. 

  206. </UL>
    207. 

  207. <P><STRONG><a name="[2a]"></a>I2C0_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    208. 

  208. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    209. 

  209. </UL>
    210. 

  210. <P><STRONG><a name="[29]"></a>I2C0_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    211. 

  211. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    212. 

  212. </UL>
    213. 

  213. <P><STRONG><a name="[2c]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    214. 

  214. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    215. 

  215. </UL>
    216. 

  216. <P><STRONG><a name="[2b]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    217. 

  217. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    218. 

  218. </UL>
    219. 

  219. <P><STRONG><a name="[b]"></a>LVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    220. 

  220. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    221. 

  221. </UL>
    222. 

  222. <P><STRONG><a name="[f]"></a>RCU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    223. 

  223. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    224. 

  224. </UL>
    225. 

  225. <P><STRONG><a name="[33]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    226. 

  226. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    227. 

  227. </UL>
    228. 

  228. <P><STRONG><a name="[d]"></a>RTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    229. 

  229. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    230. 

  230. </UL>
    231. 

  231. <P><STRONG><a name="[3b]"></a>SDIO_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    232. 

  232. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    233. 

  233. </UL>
    234. 

  234. <P><STRONG><a name="[2d]"></a>SPI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    235. 

  235. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    236. 

  236. </UL>
    237. 

  237. <P><STRONG><a name="[2e]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    238. 

  238. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    239. 

  239. </UL>
    240. 

  240. <P><STRONG><a name="[3d]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    241. 

  241. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    242. 

  242. </UL>
    243. 

  243. <P><STRONG><a name="[c]"></a>TAMPER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    244. 

  244. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    245. 

  245. </UL>
    246. 

  246. <P><STRONG><a name="[22]"></a>TIMER0_BRK_TIMER8_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    247. 

  247. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    248. 

  248. </UL>
    249. 

  249. <P><STRONG><a name="[25]"></a>TIMER0_Channel_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    250. 

  250. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    251. 

  251. </UL>
    252. 

  252. <P><STRONG><a name="[24]"></a>TIMER0_TRG_CMT_TIMER10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    253. 

  253. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    254. 

  254. </UL>
    255. 

  255. <P><STRONG><a name="[23]"></a>TIMER0_UP_TIMER9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    256. 

  256. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    257. 

  257. </UL>
    258. 

  258. <P><STRONG><a name="[26]"></a>TIMER1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    259. 

  259. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    260. 

  260. </UL>
    261. 

  261. <P><STRONG><a name="[27]"></a>TIMER2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    262. 

  262. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    263. 

  263. </UL>
    264. 

  264. <P><STRONG><a name="[28]"></a>TIMER3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    265. 

  265. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    266. 

  266. </UL>
    267. 

  267. <P><STRONG><a name="[3c]"></a>TIMER4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    268. 

  268. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    269. 

  269. </UL>
    270. 

  270. <P><STRONG><a name="[40]"></a>TIMER5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    271. 

  271. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    272. 

  272. </UL>
    273. 

  273. <P><STRONG><a name="[41]"></a>TIMER6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    274. 

  274. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    275. 

  275. </UL>
    276. 

  276. <P><STRONG><a name="[35]"></a>TIMER7_BRK_TIMER11_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    277. 

  277. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    278. 

  278. </UL>
    279. 

  279. <P><STRONG><a name="[38]"></a>TIMER7_Channel_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    280. 

  280. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    281. 

  281. </UL>
    282. 

  282. <P><STRONG><a name="[37]"></a>TIMER7_TRG_CMT_TIMER13_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    283. 

  283. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    284. 

  284. </UL>
    285. 

  285. <P><STRONG><a name="[36]"></a>TIMER7_UP_TIMER12_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    286. 

  286. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    287. 

  287. </UL>
    288. 

  288. <P><STRONG><a name="[3e]"></a>UART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    289. 

  289. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    290. 

  290. </UL>
    291. 

  291. <P><STRONG><a name="[3f]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    292. 

  292. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    293. 

  293. </UL>
    294. 

  294. <P><STRONG><a name="[30]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    295. 

  295. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    296. 

  296. </UL>
    297. 

  297. <P><STRONG><a name="[31]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    298. 

  298. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    299. 

  299. </UL>
    300. 

  300. <P><STRONG><a name="[1d]"></a>USBD_HP_CAN0_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    301. 

  301. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    302. 

  302. </UL>
    303. 

  303. <P><STRONG><a name="[1e]"></a>USBD_LP_CAN0_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    304. 

  304. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    305. 

  305. </UL>
    306. 

  306. <P><STRONG><a name="[34]"></a>USBD_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    307. 

  307. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    308. 

  308. </UL>
    309. 

  309. <P><STRONG><a name="[a]"></a>WWDGT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_xd.o(.text))
    310. 

  310. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    311. 

  311. </UL>
    312. 

  312. <P><STRONG><a name="[c3]"></a>__aeabi_memcpy</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)
    313. 

  313. 

  314. <P><STRONG><a name="[b3]"></a>__aeabi_memcpy4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text))
    315. 

  315. <BR><BR>[Called By]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_test
    316. 

  316. </UL>
    317. 

  317. 

  318. <P><STRONG><a name="[c4]"></a>__aeabi_memcpy8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)
    319. 

  319. 

  320. <P><STRONG><a name="[50]"></a>__aeabi_memset</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, memseta.o(.text))
    321. 

  321. <BR><BR>[Called By]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_memset$wrapper
    322. 

  322. <LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
    323. 

  323. </UL>
    324. 

  324. 

  325. <P><STRONG><a name="[c5]"></a>__aeabi_memset4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    326. 

  326. 

  327. <P><STRONG><a name="[c6]"></a>__aeabi_memset8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    328. 

  328. 

  329. <P><STRONG><a name="[4f]"></a>__aeabi_memclr</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, memseta.o(.text))
    330. 

  330. <BR><BR>[Calls]<UL><LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
    331. 

  331. </UL>
    332. 

  332. <BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Clear_DMA_Buffer
    333. 

  333. <LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;load_ota_message_config_params
    334. 

  334. </UL>
    335. 

  335. 

  336. <P><STRONG><a name="[5c]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text))
    337. 

  337. <BR><BR>[Called By]<UL><LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    338. 

  338. <LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_test
    339. 

  339. </UL>
    340. 

  340. 

  341. <P><STRONG><a name="[c7]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    342. 

  342. 

  343. <P><STRONG><a name="[51]"></a>_memset$wrapper</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, memseta.o(.text), UNUSED)
    344. 

  344. <BR><BR>[Calls]<UL><LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
    345. 

  345. </UL>
    346. 

  346. 

  347. <P><STRONG><a name="[8d]"></a>strstr</STRONG> (Thumb, 36 bytes, Stack size 12 bytes, strstr.o(.text))
    348. 

  348. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = strstr
    349. 

  349. </UL>
    350. 

  350. <BR>[Called By]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WaitResponse
    351. 

  351. <LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;find_string
    352. 

  352. </UL>
    353. 

  353. 

  354. <P><STRONG><a name="[98]"></a>strchr</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, strchr.o(.text))
    355. 

  355. <BR><BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;extract_data_from_buffer
    356. 

  356. </UL>
    357. 

  357. 

  358. <P><STRONG><a name="[b4]"></a>strlen</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, strlen.o(.text))
    359. 

  359. <BR><BR>[Called By]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_test
    360. 

  360. </UL>
    361. 

  361. 

  362. <P><STRONG><a name="[b5]"></a>strcpy</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, strcpy.o(.text))
    363. 

  363. <BR><BR>[Called By]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_test
    364. 

  364. </UL>
    365. 

  365. 

  366. <P><STRONG><a name="[52]"></a>__0sscanf</STRONG> (Thumb, 48 bytes, Stack size 72 bytes, __0sscanf.o(.text))
    367. 

  367. <BR><BR>[Stack]<UL><LI>Max Depth = 216<LI>Call Chain = __0sscanf &rArr; __vfscanf_char &rArr; __vfscanf &rArr; _scanf_int
    368. 

  368. </UL>
    369. 

  369. <BR>[Calls]<UL><LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__vfscanf_char
    370. 

  370. </UL>
    371. 

  371. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;extract_data_from_buffer
    372. 

  372. </UL>
    373. 

  373. 

  374. <P><STRONG><a name="[54]"></a>_scanf_int</STRONG> (Thumb, 332 bytes, Stack size 56 bytes, _scanf_int.o(.text))
    375. 

  375. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = _scanf_int
    376. 

  376. </UL>
    377. 

  377. <BR>[Calls]<UL><LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_chval
    378. 

  378. </UL>
    379. 

  379. <BR>[Called By]<UL><LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__vfscanf
    380. 

  380. </UL>
    381. 

  381. 

  382. <P><STRONG><a name="[55]"></a>_chval</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, _chval.o(.text))
    383. 

  383. <BR><BR>[Called By]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_scanf_int
    384. 

  384. </UL>
    385. 

  385. 

  386. <P><STRONG><a name="[53]"></a>__vfscanf_char</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, scanf_char.o(.text))
    387. 

  387. <BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = __vfscanf_char &rArr; __vfscanf &rArr; _scanf_int
    388. 

  388. </UL>
    389. 

  389. <BR>[Calls]<UL><LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__vfscanf
    390. 

  390. </UL>
    391. 

  391. <BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0sscanf
    392. 

  392. </UL>
    393. 

  393. 

  394. <P><STRONG><a name="[49]"></a>_sgetc</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, _sgetc.o(.text))
    395. 

  395. <BR>[Address Reference Count : 1]<UL><LI> __0sscanf.o(.text)
    396. 

  396. </UL>
    397. 

  397. <P><STRONG><a name="[4a]"></a>_sbackspace</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, _sgetc.o(.text))
    398. 

  398. <BR>[Address Reference Count : 1]<UL><LI> __0sscanf.o(.text)
    399. 

  399. </UL>
    400. 

  400. <P><STRONG><a name="[4e]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
    401. 

  401. <BR><BR>[Calls]<UL><LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
    402. 

  402. </UL>
    403. 

  403. <BR>[Called By]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
    404. 

  404. </UL>
    405. 

  405. 

  406. <P><STRONG><a name="[c8]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)
    407. 

  407. 

  408. <P><STRONG><a name="[4c]"></a>isspace</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, isspace_c.o(.text))
    409. 

  409. <BR><BR>[Calls]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__ctype_lookup
    410. 

  410. </UL>
    411. 

  411. <BR>[Address Reference Count : 1]<UL><LI> scanf_char.o(.text)
    412. 

  412. </UL>
    413. 

  413. <P><STRONG><a name="[56]"></a>__vfscanf</STRONG> (Thumb, 810 bytes, Stack size 88 bytes, _scanf.o(.text))
    414. 

  414. <BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = __vfscanf &rArr; _scanf_int
    415. 

  415. </UL>
    416. 

  416. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_scanf_int
    417. 

  417. </UL>
    418. 

  418. <BR>[Called By]<UL><LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__vfscanf_char
    419. 

  419. </UL>
    420. 

  420. 

  421. <P><STRONG><a name="[58]"></a>__ctype_lookup</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, ctype_c.o(.text))
    422. 

  422. <BR><BR>[Called By]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;isspace
    423. 

  423. </UL>
    424. 

  424. 

  425. <P><STRONG><a name="[59]"></a>BootLoader_Brance</STRONG> (Thumb, 154 bytes, Stack size 1040 bytes, boot.o(i.BootLoader_Brance))
    426. 

  426. <BR><BR>[Stack]<UL><LI>Max Depth = 1088<LI>Call Chain = BootLoader_Brance &rArr; W25Q32_Read &rArr; SPI0_Write &rArr; SPI0_ReadWriteByte
    427. 

  427. </UL>
    428. 

  428. <BR>[Calls]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_fwdgt_reload
    429. 

  429. <LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;clear_ota_message_config_block
    430. 

  430. <LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W25Q32_Read
    431. 

  431. <LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_WriteFlash
    432. 

  432. <LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_EraseFlash
    433. 

  433. <LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LOAD_A
    434. 

  434. <LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    435. 

  435. </UL>
    436. 

  436. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    437. 

  437. </UL>
    438. 

  438. 

  439. <P><STRONG><a name="[61]"></a>BootLoader_Clear</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, boot.o(i.BootLoader_Clear))
    440. 

  440. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = BootLoader_Clear &rArr; gpio_deinit
    441. 

  441. </UL>
    442. 

  442. <BR>[Calls]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_deinit
    443. 

  443. </UL>
    444. 

  444. <BR>[Called By]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LOAD_A
    445. 

  445. </UL>
    446. 

  446. 

  447. <P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_it.o(i.BusFault_Handler))
    448. 

  448. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    449. 

  449. </UL>
    450. 

  450. <P><STRONG><a name="[63]"></a>Clear_DMA_Buffer</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, usart.o(i.Clear_DMA_Buffer))
    451. 

  451. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = Clear_DMA_Buffer
    452. 

  452. </UL>
    453. 

  453. <BR>[Calls]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
    454. 

  454. </UL>
    455. 

  455. <BR>[Called By]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WaitResponse
    456. 

  456. </UL>
    457. 

  457. 

  458. <P><STRONG><a name="[19]"></a>DMA0_Channel4_IRQHandler</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, gd32f10x_it.o(i.DMA0_Channel4_IRQHandler))
    459. 

  459. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = DMA0_Channel4_IRQHandler &rArr; dma_interrupt_flag_clear
    460. 

  460. </UL>
    461. 

  461. <BR>[Calls]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_interrupt_flag_clear
    462. 

  462. </UL>
    463. 

  463. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    464. 

  464. </UL>
    465. 

  465. <P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f10x_it.o(i.DebugMon_Handler))
    466. 

  466. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    467. 

  467. </UL>
    468. 

  468. <P><STRONG><a name="[65]"></a>Delay_Init</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, delay.o(i.Delay_Init))
    469. 

  469. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = Delay_Init
    470. 

  470. </UL>
    471. 

  471. <BR>[Calls]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;systick_clksource_set
    472. 

  472. </UL>
    473. 

  473. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    474. 

  474. </UL>
    475. 

  475. 

  476. <P><STRONG><a name="[67]"></a>Delay_Ms</STRONG> (Thumb, 26 bytes, Stack size 4 bytes, delay.o(i.Delay_Ms))
    477. 

  477. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = Delay_Ms
    478. 

  478. </UL>
    479. 

  479. <BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Us
    480. 

  480. </UL>
    481. 

  481. <BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    482. 

  482. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WaitResponse
    483. 

  483. <LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;load_ota_message_config_params
    484. 

  484. <LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_test
    485. 

  485. </UL>
    486. 

  486. 

  487. <P><STRONG><a name="[68]"></a>Delay_Us</STRONG> (Thumb, 58 bytes, Stack size 0 bytes, delay.o(i.Delay_Us))
    488. 

  488. <BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Ms
    489. 

  489. </UL>
    490. 

  490. 

  491. <P><STRONG><a name="[69]"></a>EC800MPwoerOn</STRONG> (Thumb, 82 bytes, Stack size 8 bytes, ec800m.o(i.EC800MPwoerOn))
    492. 

  492. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = EC800MPwoerOn &rArr; gpio_init
    493. 

  493. </UL>
    494. 

  494. <BR>[Calls]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_pull_EC800M_rst_up
    495. 

  495. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_pull_EC800M_rst_down
    496. 

  496. <LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_pull_EC800M_pwr_up
    497. 

  497. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_pull_EC800M_pwr_down
    498. 

  498. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_set
    499. 

  499. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    500. 

  500. <LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_init
    501. 

  501. <LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Ms
    502. 

  502. </UL>
    503. 

  503. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    504. 

  504. </UL>
    505. 

  505. 

  506. <P><STRONG><a name="[71]"></a>EC800MSendCmd</STRONG> (Thumb, 48 bytes, Stack size 24 bytes, ec800m.o(i.EC800MSendCmd))
    507. 

  507. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = EC800MSendCmd &rArr; usart_flag_get
    508. 

  508. </UL>
    509. 

  509. <BR>[Calls]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_flag_get
    510. 

  510. <LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_transmit
    511. 

  511. </UL>
    512. 

  512. <BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;load_ota_message_config_params
    513. 

  513. <LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;clear_ota_message_config_block
    514. 

  514. <LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_test
    515. 

  515. </UL>
    516. 

  516. 

  517. <P><STRONG><a name="[74]"></a>EC800MWaitReady</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, ec800m.o(i.EC800MWaitReady))
    518. 

  518. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = EC800MWaitReady &rArr; WaitResponse &rArr; strstr
    519. 

  519. </UL>
    520. 

  520. <BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WaitResponse
    521. 

  521. </UL>
    522. 

  522. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    523. 

  523. </UL>
    524. 

  524. 

  525. <P><STRONG><a name="[5a]"></a>GD32_EraseFlash</STRONG> (Thumb, 48 bytes, Stack size 16 bytes, fmc.o(i.GD32_EraseFlash))
    526. 

  526. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = GD32_EraseFlash &rArr; fmc_page_erase &rArr; fmc_bank1_ready_wait
    527. 

  527. </UL>
    528. 

  528. <BR>[Calls]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_unlock
    529. 

  529. <LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_page_erase
    530. 

  530. <LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_lock
    531. 

  531. </UL>
    532. 

  532. <BR>[Called By]<UL><LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    533. 

  533. </UL>
    534. 

  534. 

  535. <P><STRONG><a name="[5e]"></a>GD32_WriteFlash</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, fmc.o(i.GD32_WriteFlash))
    536. 

  536. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = GD32_WriteFlash &rArr; fmc_word_program &rArr; fmc_bank1_ready_wait
    537. 

  537. </UL>
    538. 

  538. <BR>[Calls]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_word_program
    539. 

  539. <LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_unlock
    540. 

  540. <LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_lock
    541. 

  541. </UL>
    542. 

  542. <BR>[Called By]<UL><LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    543. 

  543. </UL>
    544. 

  544. 

  545. <P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_it.o(i.HardFault_Handler))
    546. 

  546. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    547. 

  547. </UL>
    548. 

  548. <P><STRONG><a name="[60]"></a>LOAD_A</STRONG> (Thumb, 44 bytes, Stack size 8 bytes, boot.o(i.LOAD_A))
    549. 

  549. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = LOAD_A &rArr; BootLoader_Clear &rArr; gpio_deinit
    550. 

  550. </UL>
    551. 

  551. <BR>[Calls]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Clear
    552. 

  552. <LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MSR_SP
    553. 

  553. </UL>
    554. 

  554. <BR>[Called By]<UL><LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    555. 

  555. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    556. 

  556. </UL>
    557. 

  557. 

  558. <P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_it.o(i.MemManage_Handler))
    559. 

  559. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    560. 

  560. </UL>
    561. 

  561. <P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f10x_it.o(i.NMI_Handler))
    562. 

  562. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    563. 

  563. </UL>
    564. 

  564. <P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f10x_it.o(i.PendSV_Handler))
    565. 

  565. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    566. 

  566. </UL>
    567. 

  567. <P><STRONG><a name="[7b]"></a>SPI0_Read</STRONG> (Thumb, 28 bytes, Stack size 16 bytes, spi.o(i.SPI0_Read))
    568. 

  568. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SPI0_Read &rArr; SPI0_ReadWriteByte
    569. 

  569. </UL>
    570. 

  570. <BR>[Calls]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_ReadWriteByte
    571. 

  571. </UL>
    572. 

  572. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W25Q32_Read
    573. 

  573. </UL>
    574. 

  574. 

  575. <P><STRONG><a name="[7c]"></a>SPI0_ReadWriteByte</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, spi.o(i.SPI0_ReadWriteByte))
    576. 

  576. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SPI0_ReadWriteByte
    577. 

  577. </UL>
    578. 

  578. <BR>[Calls]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;spi_i2s_flag_get
    579. 

  579. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;spi_i2s_data_transmit
    580. 

  580. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;spi_i2s_data_receive
    581. 

  581. </UL>
    582. 

  582. <BR>[Called By]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W25Q32_WaitBusy
    583. 

  583. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_Write
    584. 

  584. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_Read
    585. 

  585. </UL>
    586. 

  586. 

  587. <P><STRONG><a name="[80]"></a>SPI0_Write</STRONG> (Thumb, 26 bytes, Stack size 16 bytes, spi.o(i.SPI0_Write))
    588. 

  588. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SPI0_Write &rArr; SPI0_ReadWriteByte
    589. 

  589. </UL>
    590. 

  590. <BR>[Calls]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_ReadWriteByte
    591. 

  591. </UL>
    592. 

  592. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W25Q32_Read
    593. 

  593. </UL>
    594. 

  594. 

  595. <P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f10x_it.o(i.SVC_Handler))
    596. 

  596. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    597. 

  597. </UL>
    598. 

  598. <P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f10x_it.o(i.SysTick_Handler))
    599. 

  599. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    600. 

  600. </UL>
    601. 

  601. <P><STRONG><a name="[47]"></a>SystemInit</STRONG> (Thumb, 196 bytes, Stack size 8 bytes, system_gd32f10x.o(i.SystemInit))
    602. 

  602. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SystemInit &rArr; system_clock_config
    603. 

  603. </UL>
    604. 

  604. <BR>[Calls]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_vector_table_set
    605. 

  605. <LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_config
    606. 

  606. </UL>
    607. 

  607. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(.text)
    608. 

  608. </UL>
    609. 

  609. <P><STRONG><a name="[2f]"></a>USART0_IRQHandler</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, gd32f10x_it.o(i.USART0_IRQHandler))
    610. 

  610. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = USART0_IRQHandler &rArr; usart_interrupt_flag_get
    611. 

  611. </UL>
    612. 

  612. <BR>[Calls]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_flag_get
    613. 

  613. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_flag_clear
    614. 

  614. <LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_receive
    615. 

  615. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_enable
    616. 

  616. <LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_disable
    617. 

  617. </UL>
    618. 

  618. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    619. 

  619. </UL>
    620. 

  620. <P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_it.o(i.UsageFault_Handler))
    621. 

  621. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_xd.o(RESET)
    622. 

  622. </UL>
    623. 

  623. <P><STRONG><a name="[5d]"></a>W25Q32_Read</STRONG> (Thumb, 70 bytes, Stack size 24 bytes, w25q32.o(i.W25Q32_Read))
    624. 

  624. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = W25Q32_Read &rArr; SPI0_Write &rArr; SPI0_ReadWriteByte
    625. 

  625. </UL>
    626. 

  626. <BR>[Calls]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_set
    627. 

  627. <LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_reset
    628. 

  628. <LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W25Q32_WaitBusy
    629. 

  629. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_Write
    630. 

  630. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_Read
    631. 

  631. </UL>
    632. 

  632. <BR>[Called By]<UL><LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    633. 

  633. </UL>
    634. 

  634. 

  635. <P><STRONG><a name="[88]"></a>W25Q32_WaitBusy</STRONG> (Thumb, 44 bytes, Stack size 8 bytes, w25q32.o(i.W25Q32_WaitBusy))
    636. 

  636. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = W25Q32_WaitBusy &rArr; SPI0_ReadWriteByte
    637. 

  637. </UL>
    638. 

  638. <BR>[Calls]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_set
    639. 

  639. <LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_reset
    640. 

  640. <LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_ReadWriteByte
    641. 

  641. </UL>
    642. 

  642. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W25Q32_Read
    643. 

  643. </UL>
    644. 

  644. 

  645. <P><STRONG><a name="[8a]"></a>WaitForUpData</STRONG> (Thumb, 60 bytes, Stack size 24 bytes, ota_message.o(i.WaitForUpData))
    646. 

  646. <BR><BR>[Stack]<UL><LI>Max Depth = 272<LI>Call Chain = WaitForUpData &rArr; extract_data_from_buffer &rArr; __0sscanf &rArr; __vfscanf_char &rArr; __vfscanf &rArr; _scanf_int
    647. 

  647. </UL>
    648. 

  648. <BR>[Calls]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;extract_data_from_buffer
    649. 

  649. <LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;checksum
    650. 

  650. </UL>
    651. 

  651. <BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;load_ota_message_config_params
    652. 

  652. </UL>
    653. 

  653. 

  654. <P><STRONG><a name="[75]"></a>WaitResponse</STRONG> (Thumb, 82 bytes, Stack size 24 bytes, ec800m.o(i.WaitResponse))
    655. 

  655. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = WaitResponse &rArr; strstr
    656. 

  656. </UL>
    657. 

  657. <BR>[Calls]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Clear_DMA_Buffer
    658. 

  658. <LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Ms
    659. 

  659. <LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strstr
    660. 

  660. </UL>
    661. 

  661. <BR>[Called By]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MWaitReady
    662. 

  662. <LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;clear_ota_message_config_block
    663. 

  663. <LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_test
    664. 

  664. </UL>
    665. 

  665. 

  666. <P><STRONG><a name="[c9]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)
    667. 

  667. 

  668. <P><STRONG><a name="[ca]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)
    669. 

  669. 

  670. <P><STRONG><a name="[cb]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)
    671. 

  671. 

  672. <P><STRONG><a name="[5f]"></a>clear_ota_message_config_block</STRONG> (Thumb, 106 bytes, Stack size 8 bytes, ota_message.o(i.clear_ota_message_config_block))
    673. 

  673. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = clear_ota_message_config_block &rArr; WaitResponse &rArr; strstr
    674. 

  674. </UL>
    675. 

  675. <BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WaitResponse
    676. 

  676. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MSendCmd
    677. 

  677. </UL>
    678. 

  678. <BR>[Called By]<UL><LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    679. 

  679. </UL>
    680. 

  680. 

  681. <P><STRONG><a name="[86]"></a>dma_channel_disable</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, gd32f10x_dma.o(i.dma_channel_disable))
    682. 

  682. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = dma_channel_disable
    683. 

  683. </UL>
    684. 

  684. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_periph_and_channel_check
    685. 

  685. </UL>
    686. 

  686. <BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART0_IRQHandler
    687. 

  687. </UL>
    688. 

  688. 

  689. <P><STRONG><a name="[87]"></a>dma_channel_enable</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, gd32f10x_dma.o(i.dma_channel_enable))
    690. 

  690. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = dma_channel_enable
    691. 

  691. </UL>
    692. 

  692. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_periph_and_channel_check
    693. 

  693. </UL>
    694. 

  694. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    695. 

  695. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    696. 

  696. <LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART0_IRQHandler
    697. 

  697. </UL>
    698. 

  698. 

  699. <P><STRONG><a name="[8f]"></a>dma_circulation_disable</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, gd32f10x_dma.o(i.dma_circulation_disable))
    700. 

  700. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = dma_circulation_disable
    701. 

  701. </UL>
    702. 

  702. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_periph_and_channel_check
    703. 

  703. </UL>
    704. 

  704. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    705. 

  705. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    706. 

  706. </UL>
    707. 

  707. 

  708. <P><STRONG><a name="[90]"></a>dma_config</STRONG> (Thumb, 122 bytes, Stack size 32 bytes, usart.o(i.dma_config))
    709. 

  709. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = dma_config &rArr; dma_init
    710. 

  710. </UL>
    711. 

  711. <BR>[Calls]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_dma_transmit_config
    712. 

  712. <LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_memory_to_memory_disable
    713. 

  713. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_interrupt_enable
    714. 

  714. <LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_init
    715. 

  715. <LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_deinit
    716. 

  716. <LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_circulation_disable
    717. 

  717. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    718. 

  718. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_enable
    719. 

  719. </UL>
    720. 

  720. <BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;load_ota_message_config_params
    721. 

  721. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    722. 

  722. </UL>
    723. 

  723. 

  724. <P><STRONG><a name="[96]"></a>dma_config_change</STRONG> (Thumb, 120 bytes, Stack size 40 bytes, usart.o(i.dma_config_change))
    725. 

  725. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = dma_config_change &rArr; dma_init
    726. 

  726. </UL>
    727. 

  727. <BR>[Calls]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_dma_transmit_config
    728. 

  728. <LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_memory_to_memory_disable
    729. 

  729. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_interrupt_enable
    730. 

  730. <LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_init
    731. 

  731. <LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_deinit
    732. 

  732. <LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_circulation_disable
    733. 

  733. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    734. 

  734. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_enable
    735. 

  735. </UL>
    736. 

  736. <BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;load_ota_message_config_params
    737. 

  737. </UL>
    738. 

  738. 

  739. <P><STRONG><a name="[91]"></a>dma_deinit</STRONG> (Thumb, 112 bytes, Stack size 16 bytes, gd32f10x_dma.o(i.dma_deinit))
    740. 

  740. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = dma_deinit
    741. 

  741. </UL>
    742. 

  742. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_periph_and_channel_check
    743. 

  743. </UL>
    744. 

  744. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    745. 

  745. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    746. 

  746. </UL>
    747. 

  747. 

  748. <P><STRONG><a name="[92]"></a>dma_init</STRONG> (Thumb, 302 bytes, Stack size 24 bytes, gd32f10x_dma.o(i.dma_init))
    749. 

  749. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = dma_init
    750. 

  750. </UL>
    751. 

  751. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_periph_and_channel_check
    752. 

  752. </UL>
    753. 

  753. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    754. 

  754. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    755. 

  755. </UL>
    756. 

  756. 

  757. <P><STRONG><a name="[95]"></a>dma_interrupt_enable</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, gd32f10x_dma.o(i.dma_interrupt_enable))
    758. 

  758. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = dma_interrupt_enable
    759. 

  759. </UL>
    760. 

  760. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_periph_and_channel_check
    761. 

  761. </UL>
    762. 

  762. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    763. 

  763. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    764. 

  764. </UL>
    765. 

  765. 

  766. <P><STRONG><a name="[64]"></a>dma_interrupt_flag_clear</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, gd32f10x_dma.o(i.dma_interrupt_flag_clear))
    767. 

  767. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = dma_interrupt_flag_clear
    768. 

  768. </UL>
    769. 

  769. <BR>[Called By]<UL><LI><a href="#[19]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA0_Channel4_IRQHandler
    770. 

  770. </UL>
    771. 

  771. 

  772. <P><STRONG><a name="[93]"></a>dma_memory_to_memory_disable</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, gd32f10x_dma.o(i.dma_memory_to_memory_disable))
    773. 

  773. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = dma_memory_to_memory_disable
    774. 

  774. </UL>
    775. 

  775. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_periph_and_channel_check
    776. 

  776. </UL>
    777. 

  777. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    778. 

  778. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    779. 

  779. </UL>
    780. 

  780. 

  781. <P><STRONG><a name="[99]"></a>fmc_bank0_ready_wait</STRONG> (Thumb, 34 bytes, Stack size 4 bytes, gd32f10x_fmc.o(i.fmc_bank0_ready_wait))
    782. 

  782. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = fmc_bank0_ready_wait
    783. 

  783. </UL>
    784. 

  784. <BR>[Calls]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_state_get
    785. 

  785. </UL>
    786. 

  786. <BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_word_program
    787. 

  787. <LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_page_erase
    788. 

  788. </UL>
    789. 

  789. 

  790. <P><STRONG><a name="[9a]"></a>fmc_bank0_state_get</STRONG> (Thumb, 44 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_bank0_state_get))
    791. 

  791. <BR><BR>[Called By]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_ready_wait
    792. 

  792. </UL>
    793. 

  793. 

  794. <P><STRONG><a name="[9b]"></a>fmc_bank1_ready_wait</STRONG> (Thumb, 34 bytes, Stack size 4 bytes, gd32f10x_fmc.o(i.fmc_bank1_ready_wait))
    795. 

  795. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = fmc_bank1_ready_wait
    796. 

  796. </UL>
    797. 

  797. <BR>[Calls]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_state_get
    798. 

  798. </UL>
    799. 

  799. <BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_word_program
    800. 

  800. <LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_page_erase
    801. 

  801. </UL>
    802. 

  802. 

  803. <P><STRONG><a name="[9c]"></a>fmc_bank1_state_get</STRONG> (Thumb, 44 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_bank1_state_get))
    804. 

  804. <BR><BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_ready_wait
    805. 

  805. </UL>
    806. 

  806. 

  807. <P><STRONG><a name="[78]"></a>fmc_lock</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_lock))
    808. 

  808. <BR><BR>[Called By]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_WriteFlash
    809. 

  809. <LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_EraseFlash
    810. 

  810. </UL>
    811. 

  811. 

  812. <P><STRONG><a name="[77]"></a>fmc_page_erase</STRONG> (Thumb, 222 bytes, Stack size 12 bytes, gd32f10x_fmc.o(i.fmc_page_erase))
    813. 

  813. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = fmc_page_erase &rArr; fmc_bank1_ready_wait
    814. 

  814. </UL>
    815. 

  815. <BR>[Calls]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_ready_wait
    816. 

  816. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_ready_wait
    817. 

  817. </UL>
    818. 

  818. <BR>[Called By]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_EraseFlash
    819. 

  819. </UL>
    820. 

  820. 

  821. <P><STRONG><a name="[76]"></a>fmc_unlock</STRONG> (Thumb, 52 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_unlock))
    822. 

  822. <BR><BR>[Called By]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_WriteFlash
    823. 

  823. <LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_EraseFlash
    824. 

  824. </UL>
    825. 

  825. 

  826. <P><STRONG><a name="[79]"></a>fmc_word_program</STRONG> (Thumb, 178 bytes, Stack size 16 bytes, gd32f10x_fmc.o(i.fmc_word_program))
    827. 

  827. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = fmc_word_program &rArr; fmc_bank1_ready_wait
    828. 

  828. </UL>
    829. 

  829. <BR>[Calls]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_ready_wait
    830. 

  830. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_ready_wait
    831. 

  831. </UL>
    832. 

  832. <BR>[Called By]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GD32_WriteFlash
    833. 

  833. </UL>
    834. 

  834. 

  835. <P><STRONG><a name="[af]"></a>free</STRONG> (Thumb, 76 bytes, Stack size 8 bytes, malloc.o(i.free))
    836. 

  836. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = free
    837. 

  837. </UL>
    838. 

  838. <BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;load_ota_message_config_params
    839. 

  839. <LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_test
    840. 

  840. </UL>
    841. 

  841. 

  842. <P><STRONG><a name="[ba]"></a>fwdgt_counter_reload</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_fwdgt.o(i.fwdgt_counter_reload))
    843. 

  843. <BR><BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_fwdgt_reload
    844. 

  844. </UL>
    845. 

  845. 

  846. <P><STRONG><a name="[b9]"></a>fwdgt_write_enable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_fwdgt.o(i.fwdgt_write_enable))
    847. 

  847. <BR><BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_fwdgt_reload
    848. 

  848. </UL>
    849. 

  849. 

  850. <P><STRONG><a name="[9d]"></a>gd_EC800M_pin_init</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, usart.o(i.gd_EC800M_pin_init))
    851. 

  851. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = gd_EC800M_pin_init &rArr; gpio_init
    852. 

  852. </UL>
    853. 

  853. <BR>[Calls]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    854. 

  854. <LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_init
    855. 

  855. </UL>
    856. 

  856. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    857. 

  857. </UL>
    858. 

  858. 

  859. <P><STRONG><a name="[9e]"></a>gd_com_init</STRONG> (Thumb, 210 bytes, Stack size 16 bytes, usart.o(i.gd_com_init))
    860. 

  860. <BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = gd_com_init &rArr; usart_baudrate_set &rArr; rcu_clock_freq_get
    861. 

  861. </UL>
    862. 

  862. <BR>[Calls]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_word_length_set
    863. 

  863. <LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_transmit_config
    864. 

  864. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_stop_bit_set
    865. 

  865. <LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_receive_config
    866. 

  866. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_parity_config
    867. 

  867. <LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_enable
    868. 

  868. <LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_hardware_flow_rts_config
    869. 

  869. <LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_hardware_flow_cts_config
    870. 

  870. <LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_enable
    871. 

  871. <LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
    872. 

  872. <LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_baudrate_set
    873. 

  873. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_pin_remap_config
    874. 

  874. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    875. 

  875. <LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_init
    876. 

  876. </UL>
    877. 

  877. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    878. 

  878. </UL>
    879. 

  879. 

  880. <P><STRONG><a name="[6f]"></a>gd_pull_EC800M_pwr_down</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, usart.o(i.gd_pull_EC800M_pwr_down))
    881. 

  881. <BR><BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    882. 

  882. </UL>
    883. 

  883. 

  884. <P><STRONG><a name="[6d]"></a>gd_pull_EC800M_pwr_up</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, usart.o(i.gd_pull_EC800M_pwr_up))
    885. 

  885. <BR><BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    886. 

  886. </UL>
    887. 

  887. 

  888. <P><STRONG><a name="[6e]"></a>gd_pull_EC800M_rst_down</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, usart.o(i.gd_pull_EC800M_rst_down))
    889. 

  889. <BR><BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    890. 

  890. </UL>
    891. 

  891. 

  892. <P><STRONG><a name="[70]"></a>gd_pull_EC800M_rst_up</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, usart.o(i.gd_pull_EC800M_rst_up))
    893. 

  893. <BR><BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    894. 

  894. </UL>
    895. 

  895. 

  896. <P><STRONG><a name="[b2]"></a>get_config_params</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, ota_message.o(i.get_config_params))
    897. 

  897. <BR><BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    898. 

  898. </UL>
    899. 

  899. 

  900. <P><STRONG><a name="[89]"></a>gpio_bit_reset</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_gpio.o(i.gpio_bit_reset))
    901. 

  901. <BR><BR>[Called By]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W25Q32_WaitBusy
    902. 

  902. <LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W25Q32_Read
    903. 

  903. </UL>
    904. 

  904. 

  905. <P><STRONG><a name="[6c]"></a>gpio_bit_set</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_gpio.o(i.gpio_bit_set))
    906. 

  906. <BR><BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    907. 

  907. <LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W25Q32_WaitBusy
    908. 

  908. <LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W25Q32_Read
    909. 

  909. </UL>
    910. 

  910. 

  911. <P><STRONG><a name="[62]"></a>gpio_deinit</STRONG> (Thumb, 186 bytes, Stack size 8 bytes, gd32f10x_gpio.o(i.gpio_deinit))
    912. 

  912. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = gpio_deinit
    913. 

  913. </UL>
    914. 

  914. <BR>[Calls]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_enable
    915. 

  915. <LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_disable
    916. 

  916. </UL>
    917. 

  917. <BR>[Called By]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Clear
    918. 

  918. </UL>
    919. 

  919. 

  920. <P><STRONG><a name="[6b]"></a>gpio_init</STRONG> (Thumb, 172 bytes, Stack size 20 bytes, gd32f10x_gpio.o(i.gpio_init))
    921. 

  921. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = gpio_init
    922. 

  922. </UL>
    923. 

  923. <BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    924. 

  924. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_EC800M_pin_init
    925. 

  925. <LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    926. 

  926. </UL>
    927. 

  927. 

  928. <P><STRONG><a name="[9f]"></a>gpio_pin_remap_config</STRONG> (Thumb, 138 bytes, Stack size 20 bytes, gd32f10x_gpio.o(i.gpio_pin_remap_config))
    929. 

  929. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = gpio_pin_remap_config
    930. 

  930. </UL>
    931. 

  931. <BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    932. 

  932. </UL>
    933. 

  933. 

  934. <P><STRONG><a name="[ad]"></a>load_ota_message_config_params</STRONG> (Thumb, 122 bytes, Stack size 16 bytes, ota_message.o(i.load_ota_message_config_params))
    935. 

  935. <BR><BR>[Stack]<UL><LI>Max Depth = 288<LI>Call Chain = load_ota_message_config_params &rArr; WaitForUpData &rArr; extract_data_from_buffer &rArr; __0sscanf &rArr; __vfscanf_char &rArr; __vfscanf &rArr; _scanf_int
    936. 

  936. </UL>
    937. 

  937. <BR>[Calls]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    938. 

  938. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    939. 

  939. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MSendCmd
    940. 

  940. <LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WaitForUpData
    941. 

  941. <LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Ms
    942. 

  942. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
    943. 

  943. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
    944. 

  944. <LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
    945. 

  945. </UL>
    946. 

  946. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    947. 

  947. </UL>
    948. 

  948. 

  949. <P><STRONG><a name="[46]"></a>main</STRONG> (Thumb, 68 bytes, Stack size 0 bytes, main.o(i.main))
    950. 

  950. <BR><BR>[Stack]<UL><LI>Max Depth = 1088<LI>Call Chain = main &rArr; BootLoader_Brance &rArr; W25Q32_Read &rArr; SPI0_Write &rArr; SPI0_ReadWriteByte
    951. 

  951. </UL>
    952. 

  952. <BR>[Calls]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_config
    953. 

  953. <LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    954. 

  954. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_EC800M_pin_init
    955. 

  955. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MWaitReady
    956. 

  956. <LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    957. 

  957. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    958. 

  958. <LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;load_ota_message_config_params
    959. 

  959. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_config_params
    960. 

  960. <LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Init
    961. 

  961. <LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_fwdgt_reload
    962. 

  962. <LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LOAD_A
    963. 

  963. <LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    964. 

  964. <LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_test
    965. 

  965. </UL>
    966. 

  966. <BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
    967. 

  967. </UL>
    968. 

  968. <P><STRONG><a name="[ae]"></a>malloc</STRONG> (Thumb, 92 bytes, Stack size 20 bytes, malloc.o(i.malloc))
    969. 

  969. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = malloc
    970. 

  970. </UL>
    971. 

  971. <BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;load_ota_message_config_params
    972. 

  972. </UL>
    973. 

  973. 

  974. <P><STRONG><a name="[b1]"></a>my_test</STRONG> (Thumb, 282 bytes, Stack size 264 bytes, main.o(i.my_test))
    975. 

  975. <BR><BR>[Stack]<UL><LI>Max Depth = 300<LI>Call Chain = my_test &rArr; WaitResponse &rArr; strstr
    976. 

  976. </UL>
    977. 

  977. <BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WaitResponse
    978. 

  978. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MSendCmd
    979. 

  979. <LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Ms
    980. 

  980. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
    981. 

  981. <LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strcpy
    982. 

  982. <LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strlen
    983. 

  983. <LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    984. 

  984. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
    985. 

  985. </UL>
    986. 

  986. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    987. 

  987. </UL>
    988. 

  988. 

  989. <P><STRONG><a name="[b0]"></a>nvic_config</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, usart.o(i.nvic_config))
    990. 

  990. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = nvic_config &rArr; nvic_irq_enable
    991. 

  991. </UL>
    992. 

  992. <BR>[Calls]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_priority_group_set
    993. 

  993. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
    994. 

  994. </UL>
    995. 

  995. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    996. 

  996. </UL>
    997. 

  997. 

  998. <P><STRONG><a name="[b7]"></a>nvic_irq_enable</STRONG> (Thumb, 162 bytes, Stack size 24 bytes, gd32f10x_misc.o(i.nvic_irq_enable))
    999. 

  999. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = nvic_irq_enable
    1000. 

  1000. </UL>
    1001. 

  1001. <BR>[Calls]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_priority_group_set
    1002. 

  1002. </UL>
    1003. 

  1003. <BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_config
    1004. 

  1004. </UL>
    1005. 

  1005. 

  1006. <P><STRONG><a name="[b6]"></a>nvic_priority_group_set</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_misc.o(i.nvic_priority_group_set))
    1007. 

  1007. <BR><BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
    1008. 

  1008. <LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_config
    1009. 

  1009. </UL>
    1010. 

  1010. 

  1011. <P><STRONG><a name="[82]"></a>nvic_vector_table_set</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_misc.o(i.nvic_vector_table_set))
    1012. 

  1012. <BR><BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
    1013. 

  1013. </UL>
    1014. 

  1014. 

  1015. <P><STRONG><a name="[bb]"></a>rcu_clock_freq_get</STRONG> (Thumb, 264 bytes, Stack size 80 bytes, gd32f10x_rcu.o(i.rcu_clock_freq_get))
    1016. 

  1016. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = rcu_clock_freq_get
    1017. 

  1017. </UL>
    1018. 

  1018. <BR>[Called By]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_baudrate_set
    1019. 

  1019. </UL>
    1020. 

  1020. 

  1021. <P><STRONG><a name="[6a]"></a>rcu_periph_clock_enable</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_rcu.o(i.rcu_periph_clock_enable))
    1022. 

  1022. <BR><BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1023. 

  1023. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_EC800M_pin_init
    1024. 

  1024. <LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MPwoerOn
    1025. 

  1025. <LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    1026. 

  1026. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    1027. 

  1027. </UL>
    1028. 

  1028. 

  1029. <P><STRONG><a name="[ac]"></a>rcu_periph_reset_disable</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_rcu.o(i.rcu_periph_reset_disable))
    1030. 

  1030. <BR><BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
    1031. 

  1031. <LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_deinit
    1032. 

  1032. </UL>
    1033. 

  1033. 

  1034. <P><STRONG><a name="[ab]"></a>rcu_periph_reset_enable</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_rcu.o(i.rcu_periph_reset_enable))
    1035. 

  1035. <BR><BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
    1036. 

  1036. <LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_deinit
    1037. 

  1037. </UL>
    1038. 

  1038. 

  1039. <P><STRONG><a name="[7f]"></a>spi_i2s_data_receive</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, gd32f10x_spi.o(i.spi_i2s_data_receive))
    1040. 

  1040. <BR><BR>[Called By]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_ReadWriteByte
    1041. 

  1041. </UL>
    1042. 

  1042. 

  1043. <P><STRONG><a name="[7e]"></a>spi_i2s_data_transmit</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_spi.o(i.spi_i2s_data_transmit))
    1044. 

  1044. <BR><BR>[Called By]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_ReadWriteByte
    1045. 

  1045. </UL>
    1046. 

  1046. 

  1047. <P><STRONG><a name="[7d]"></a>spi_i2s_flag_get</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_spi.o(i.spi_i2s_flag_get))
    1048. 

  1048. <BR><BR>[Called By]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI0_ReadWriteByte
    1049. 

  1049. </UL>
    1050. 

  1050. 

  1051. <P><STRONG><a name="[66]"></a>systick_clksource_set</STRONG> (Thumb, 40 bytes, Stack size 0 bytes, gd32f10x_misc.o(i.systick_clksource_set))
    1052. 

  1052. <BR><BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Delay_Init
    1053. 

  1053. </UL>
    1054. 

  1054. 

  1055. <P><STRONG><a name="[5b]"></a>task_fwdgt_reload</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, main.o(i.task_fwdgt_reload))
    1056. 

  1056. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = task_fwdgt_reload
    1057. 

  1057. </UL>
    1058. 

  1058. <BR>[Calls]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fwdgt_write_enable
    1059. 

  1059. <LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fwdgt_counter_reload
    1060. 

  1060. </UL>
    1061. 

  1061. <BR>[Called By]<UL><LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BootLoader_Brance
    1062. 

  1062. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1063. 

  1063. </UL>
    1064. 

  1064. 

  1065. <P><STRONG><a name="[a1]"></a>usart_baudrate_set</STRONG> (Thumb, 136 bytes, Stack size 32 bytes, gd32f10x_usart.o(i.usart_baudrate_set))
    1066. 

  1066. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = usart_baudrate_set &rArr; rcu_clock_freq_get
    1067. 

  1067. </UL>
    1068. 

  1068. <BR>[Calls]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_clock_freq_get
    1069. 

  1069. </UL>
    1070. 

  1070. <BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1071. 

  1071. </UL>
    1072. 

  1072. 

  1073. <P><STRONG><a name="[85]"></a>usart_data_receive</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_data_receive))
    1074. 

  1074. <BR><BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART0_IRQHandler
    1075. 

  1075. </UL>
    1076. 

  1076. 

  1077. <P><STRONG><a name="[72]"></a>usart_data_transmit</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_data_transmit))
    1078. 

  1078. <BR><BR>[Called By]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MSendCmd
    1079. 

  1079. </UL>
    1080. 

  1080. 

  1081. <P><STRONG><a name="[a0]"></a>usart_deinit</STRONG> (Thumb, 136 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_deinit))
    1082. 

  1082. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_deinit
    1083. 

  1083. </UL>
    1084. 

  1084. <BR>[Calls]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_enable
    1085. 

  1085. <LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_disable
    1086. 

  1086. </UL>
    1087. 

  1087. <BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1088. 

  1088. </UL>
    1089. 

  1089. 

  1090. <P><STRONG><a name="[94]"></a>usart_dma_transmit_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_dma_transmit_config))
    1091. 

  1091. <BR><BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config_change
    1092. 

  1092. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_config
    1093. 

  1093. </UL>
    1094. 

  1094. 

  1095. <P><STRONG><a name="[a9]"></a>usart_enable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_enable))
    1096. 

  1096. <BR><BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1097. 

  1097. </UL>
    1098. 

  1098. 

  1099. <P><STRONG><a name="[73]"></a>usart_flag_get</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_flag_get))
    1100. 

  1100. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_flag_get
    1101. 

  1101. </UL>
    1102. 

  1102. <BR>[Called By]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EC800MSendCmd
    1103. 

  1103. </UL>
    1104. 

  1104. 

  1105. <P><STRONG><a name="[a6]"></a>usart_hardware_flow_cts_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_hardware_flow_cts_config))
    1106. 

  1106. <BR><BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1107. 

  1107. </UL>
    1108. 

  1108. 

  1109. <P><STRONG><a name="[a5]"></a>usart_hardware_flow_rts_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_hardware_flow_rts_config))
    1110. 

  1110. <BR><BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1111. 

  1111. </UL>
    1112. 

  1112. 

  1113. <P><STRONG><a name="[aa]"></a>usart_interrupt_enable</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_interrupt_enable))
    1114. 

  1114. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_interrupt_enable
    1115. 

  1115. </UL>
    1116. 

  1116. <BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1117. 

  1117. </UL>
    1118. 

  1118. 

  1119. <P><STRONG><a name="[84]"></a>usart_interrupt_flag_clear</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_interrupt_flag_clear))
    1120. 

  1120. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_interrupt_flag_clear
    1121. 

  1121. </UL>
    1122. 

  1122. <BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART0_IRQHandler
    1123. 

  1123. </UL>
    1124. 

  1124. 

  1125. <P><STRONG><a name="[83]"></a>usart_interrupt_flag_get</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, gd32f10x_usart.o(i.usart_interrupt_flag_get))
    1126. 

  1126. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = usart_interrupt_flag_get
    1127. 

  1127. </UL>
    1128. 

  1128. <BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART0_IRQHandler
    1129. 

  1129. </UL>
    1130. 

  1130. 

  1131. <P><STRONG><a name="[a4]"></a>usart_parity_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_parity_config))
    1132. 

  1132. <BR><BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1133. 

  1133. </UL>
    1134. 

  1134. 

  1135. <P><STRONG><a name="[a7]"></a>usart_receive_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_receive_config))
    1136. 

  1136. <BR><BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1137. 

  1137. </UL>
    1138. 

  1138. 

  1139. <P><STRONG><a name="[a3]"></a>usart_stop_bit_set</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_stop_bit_set))
    1140. 

  1140. <BR><BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1141. 

  1141. </UL>
    1142. 

  1142. 

  1143. <P><STRONG><a name="[a8]"></a>usart_transmit_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_transmit_config))
    1144. 

  1144. <BR><BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1145. 

  1145. </UL>
    1146. 

  1146. 

  1147. <P><STRONG><a name="[a2]"></a>usart_word_length_set</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_word_length_set))
    1148. 

  1148. <BR><BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_com_init
    1149. 

  1149. </UL>
    1150. 

  1150. <P>
    1151. 

  1151. <H3>
    1152. 

  1152. Local Symbols
    1153. 

  1153. </H3>
    1154. 

  1154. <P><STRONG><a name="[b8]"></a>system_clock_108m_hxtal</STRONG> (Thumb, 182 bytes, Stack size 0 bytes, system_gd32f10x.o(i.system_clock_108m_hxtal))
    1155. 

  1155. <BR><BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_config
    1156. 

  1156. </UL>
    1157. 

  1157. 

  1158. <P><STRONG><a name="[81]"></a>system_clock_config</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, system_gd32f10x.o(i.system_clock_config))
    1159. 

  1159. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = system_clock_config
    1160. 

  1160. </UL>
    1161. 

  1161. <BR>[Calls]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_108m_hxtal
    1162. 

  1162. </UL>
    1163. 

  1163. <BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
    1164. 

  1164. </UL>
    1165. 

  1165. 

  1166. <P><STRONG><a name="[8c]"></a>checksum</STRONG> (Thumb, 66 bytes, Stack size 16 bytes, ota_message.o(i.checksum))
    1167. 

  1167. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = checksum
    1168. 

  1168. </UL>
    1169. 

  1169. <BR>[Called By]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WaitForUpData
    1170. 

  1170. </UL>
    1171. 

  1171. 

  1172. <P><STRONG><a name="[8b]"></a>extract_data_from_buffer</STRONG> (Thumb, 80 bytes, Stack size 32 bytes, ota_message.o(i.extract_data_from_buffer))
    1173. 

  1173. <BR><BR>[Stack]<UL><LI>Max Depth = 248<LI>Call Chain = extract_data_from_buffer &rArr; __0sscanf &rArr; __vfscanf_char &rArr; __vfscanf &rArr; _scanf_int
    1174. 

  1174. </UL>
    1175. 

  1175. <BR>[Calls]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;find_string
    1176. 

  1176. <LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0sscanf
    1177. 

  1177. <LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strchr
    1178. 

  1178. </UL>
    1179. 

  1179. <BR>[Called By]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WaitForUpData
    1180. 

  1180. </UL>
    1181. 

  1181. 

  1182. <P><STRONG><a name="[97]"></a>find_string</STRONG> (Thumb, 56 bytes, Stack size 24 bytes, ota_message.o(i.find_string))
    1183. 

  1183. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = find_string &rArr; strstr
    1184. 

  1184. </UL>
    1185. 

  1185. <BR>[Calls]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strstr
    1186. 

  1186. </UL>
    1187. 

  1187. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;extract_data_from_buffer
    1188. 

  1188. </UL>
    1189. 

  1189. 

  1190. <P><STRONG><a name="[8e]"></a>dma_periph_and_channel_check</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, gd32f10x_dma.o(i.dma_periph_and_channel_check))
    1191. 

  1191. <BR><BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_memory_to_memory_disable
    1192. 

  1192. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_interrupt_enable
    1193. 

  1193. <LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_init
    1194. 

  1194. <LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_deinit
    1195. 

  1195. <LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_circulation_disable
    1196. 

  1196. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_enable
    1197. 

  1197. <LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_disable
    1198. 

  1198. </UL>
    1199. 

  1199. 

  1200. <P><STRONG><a name="[4b]"></a>_scanf_char_input</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, scanf_char.o(.text))
    1201. 

  1201. <BR>[Address Reference Count : 1]<UL><LI> scanf_char.o(.text)
    1202. 

  1202. </UL><P>
    1203. 

  1203. <H3>
    1204. 

  1204. Undefined Global Symbols
    1205. 

  1205. </H3><HR></body></html>
    1206.