c_cpp_properties.json 4.2 KB

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  1. {
  2. "configurations": [
  3. {
  4. "name": "Target 1",
  5. "includePath": [
  6. "d:\\Project\\Lora_gateway_sx1278\\app\\CORE",
  7. "d:\\Project\\Lora_gateway_sx1278\\app\\Libraries\\inc",
  8. "d:\\Project\\Lora_gateway_sx1278\\app\\USER",
  9. "d:\\Project\\Lora_gateway_sx1278\\app\\HARDWARE\\includes",
  10. "d:\\Project\\Lora_gateway_sx1278\\app\\USER\\FatFS\\src",
  11. "d:\\Project\\Lora_gateway_sx1278\\app\\UCOS-II\\CONFIG",
  12. "d:\\Project\\Lora_gateway_sx1278\\app\\UCOS-II\\Ports",
  13. "d:\\Project\\Lora_gateway_sx1278\\app\\UCOS-II\\Source",
  14. "d:\\Project\\Lora_gateway_sx1278\\app\\SYSTEM\\includes",
  15. "d:\\Project\\Lora_gateway_sx1278\\app\\Sx1278\\radio",
  16. "d:\\Project\\Lora_gateway_sx1278\\app\\Sx1278\\platform",
  17. "d:\\Project\\Lora_gateway_sx1278\\app\\modbus",
  18. "d:\\Project\\Lora_gateway_sx1278\\app\\dlt\\inc",
  19. "d:\\Project\\Lora_gateway_sx1278\\app\\dlt\\port",
  20. "d:\\Project\\Lora_gateway_sx1278\\app\\dlt\\src",
  21. "D:\\workSoftware\\stm32Software\\mdk\\mdkcore\\ARM\\ARMCC\\include",
  22. "D:\\workSoftware\\stm32Software\\mdk\\mdkcore\\ARM\\ARMCC\\include\\rw",
  23. "d:\\Project\\Lora_gateway_sx1278\\app\\SYSTEM\\source",
  24. "d:\\Project\\Lora_gateway_sx1278\\app\\Libraries\\src",
  25. "d:\\Project\\Lora_gateway_sx1278\\app\\HARDWARE\\sources",
  26. "d:\\Project\\Lora_gateway_sx1278\\app\\USER\\FatFS\\src\\option"
  27. ],
  28. "defines": [
  29. "USE_STDPERIPH_DRIVER",
  30. "DATA_IN_ExtSRAM",
  31. "MASTER",
  32. "__CC_ARM",
  33. "__arm__",
  34. "__align(x)=",
  35. "__ALIGNOF__(x)=",
  36. "__alignof__(x)=",
  37. "__asm(x)=",
  38. "__forceinline=",
  39. "__restrict=",
  40. "__global_reg(n)=",
  41. "__inline=",
  42. "__int64=long long",
  43. "__INTADDR__(expr)=0",
  44. "__irq=",
  45. "__packed=",
  46. "__pure=",
  47. "__smc(n)=",
  48. "__svc(n)=",
  49. "__svc_indirect(n)=",
  50. "__svc_indirect_r7(n)=",
  51. "__value_in_regs=",
  52. "__weak=",
  53. "__writeonly=",
  54. "__declspec(x)=",
  55. "__attribute__(x)=",
  56. "__nonnull__(x)=",
  57. "__register=",
  58. "__breakpoint(x)=",
  59. "__cdp(x,y,z)=",
  60. "__clrex()=",
  61. "__clz(x)=0U",
  62. "__current_pc()=0U",
  63. "__current_sp()=0U",
  64. "__disable_fiq()=",
  65. "__disable_irq()=",
  66. "__dmb(x)=",
  67. "__dsb(x)=",
  68. "__enable_fiq()=",
  69. "__enable_irq()=",
  70. "__fabs(x)=0.0",
  71. "__fabsf(x)=0.0f",
  72. "__force_loads()=",
  73. "__force_stores()=",
  74. "__isb(x)=",
  75. "__ldrex(x)=0U",
  76. "__ldrexd(x)=0U",
  77. "__ldrt(x)=0U",
  78. "__memory_changed()=",
  79. "__nop()=",
  80. "__pld(...)=",
  81. "__pli(...)=",
  82. "__qadd(x,y)=0",
  83. "__qdbl(x)=0",
  84. "__qsub(x,y)=0",
  85. "__rbit(x)=0U",
  86. "__rev(x)=0U",
  87. "__return_address()=0U",
  88. "__ror(x,y)=0U",
  89. "__schedule_barrier()=",
  90. "__semihost(x,y)=0",
  91. "__sev()=",
  92. "__sqrt(x)=0.0",
  93. "__sqrtf(x)=0.0f",
  94. "__ssat(x,y)=0",
  95. "__strex(x,y)=0U",
  96. "__strexd(x,y)=0",
  97. "__strt(x,y)=",
  98. "__swp(x,y)=0U",
  99. "__usat(x,y)=0U",
  100. "__wfe()=",
  101. "__wfi()=",
  102. "__yield()=",
  103. "__vfp_status(x,y)=0"
  104. ],
  105. "intelliSenseMode": "${default}"
  106. }
  107. ],
  108. "version": 4
  109. }