Static Call Graph for image ..\OBJ\lora_gateway.axf

Function Pointers

• ADC_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• BusFault_Handler from stm32f2xx_it.o(i.BusFault_Handler) referenced from startup_stm32f2xx.o(RESET)
• CAN1_RX0_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• CAN1_RX1_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• CAN1_SCE_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• CAN1_TX_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• CAN2_RX0_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• CAN2_RX1_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• CAN2_SCE_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• CAN2_TX_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• CRYP_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DCMI_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA1_Stream0_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA1_Stream1_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA1_Stream2_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA1_Stream3_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA1_Stream4_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA1_Stream5_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA1_Stream6_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA1_Stream7_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA2_Stream0_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA2_Stream1_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA2_Stream2_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA2_Stream3_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA2_Stream4_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA2_Stream5_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA2_Stream6_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DMA2_Stream7_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• DebugMon_Handler from stm32f2xx_it.o(i.DebugMon_Handler) referenced from startup_stm32f2xx.o(RESET)
• ETH_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• ETH_WKUP_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• EXTI0_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• EXTI15_10_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• EXTI1_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• EXTI2_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• EXTI3_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• EXTI4_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• EXTI9_5_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• FLASH_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• FSMC_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• HASH_RNG_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• HardFault_Handler from stm32f2xx_it.o(i.HardFault_Handler) referenced from startup_stm32f2xx.o(RESET)
• I2C1_ER_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• I2C1_EV_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• I2C2_ER_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• I2C2_EV_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• I2C3_ER_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• I2C3_EV_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• MemManage_Handler from stm32f2xx_it.o(i.MemManage_Handler) referenced from startup_stm32f2xx.o(RESET)
• NMI_Handler from stm32f2xx_it.o(i.NMI_Handler) referenced from startup_stm32f2xx.o(RESET)
• OTG_FS_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• OTG_FS_WKUP_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• OTG_HS_EP1_IN_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• OTG_HS_EP1_OUT_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• OTG_HS_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• OTG_HS_WKUP_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• PVD_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• PendSV_Handler from stm32f2xx_it.o(i.PendSV_Handler) referenced from startup_stm32f2xx.o(RESET)
• RCC_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• RTC_Alarm_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• RTC_WKUP_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• Reset_Handler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• SDIO_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• SPI1_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• SPI2_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• SPI3_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• SVC_Handler from stm32f2xx_it.o(i.SVC_Handler) referenced from startup_stm32f2xx.o(RESET)
• SysTick_Handler from stm32f2xx_it.o(i.SysTick_Handler) referenced from startup_stm32f2xx.o(RESET)
• SystemInit from system_stm32f2xx.o(i.SystemInit) referenced from startup_stm32f2xx.o(.text)
• TAMP_STAMP_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• TIM1_BRK_TIM9_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• TIM1_CC_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• TIM1_TRG_COM_TIM11_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• TIM1_UP_TIM10_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• TIM2_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• TIM3_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• TIM4_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• TIM5_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• TIM6_DAC_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• TIM7_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• TIM8_BRK_TIM12_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• TIM8_CC_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• TIM8_TRG_COM_TIM14_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• TIM8_UP_TIM13_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• UART4_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• UART5_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• USART1_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• USART2_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• USART3_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• USART6_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• UsageFault_Handler from stm32f2xx_it.o(i.UsageFault_Handler) referenced from startup_stm32f2xx.o(RESET)
• WWDG_IRQHandler from startup_stm32f2xx.o(.text) referenced from startup_stm32f2xx.o(RESET)
• __main from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32f2xx.o(.text)
• fputc from usart.o(i.fputc) referenced from printf8.o(i.__0printf$8)
• main from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
• my_mem_init from malloc.o(i.my_mem_init) referenced from malloc.o(.data)
• my_mem_perused from malloc.o(i.my_mem_perused) referenced from malloc.o(.data)

Global Symbols

__main (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
[Address Reference Count : 1]

• startup_stm32f2xx.o(.text)

_main_stk (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))

_main_scatterload (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))

[Calls]

• >>   __scatterload

__main_after_scatterload (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))

[Called By]

• >>   __scatterload

_main_clock (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))

_main_cpp_init (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))

_main_init (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))

__rt_final_cpp (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))

__rt_final_exit (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))

Reset_Handler (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

ADC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))

[Calls]

• >>   ADC_IRQHandler

• >>   ADC_IRQHandler

• startup_stm32f2xx.o(RESET)

CAN1_RX0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

CAN1_RX1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

CAN1_SCE_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

CAN1_TX_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

CAN2_RX0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

CAN2_RX1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

CAN2_SCE_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

CAN2_TX_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

CRYP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DCMI_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA1_Stream0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA1_Stream1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA1_Stream2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA1_Stream3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA1_Stream4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA1_Stream5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA1_Stream6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA1_Stream7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA2_Stream0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA2_Stream1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA2_Stream2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA2_Stream3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA2_Stream4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA2_Stream5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA2_Stream6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DMA2_Stream7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

ETH_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

ETH_WKUP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

EXTI0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

EXTI15_10_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

EXTI1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

EXTI2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

EXTI3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

EXTI4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

EXTI9_5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

FLASH_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

FSMC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

HASH_RNG_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

I2C1_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

I2C1_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

I2C2_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

I2C2_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

I2C3_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

I2C3_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

OTG_FS_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

OTG_FS_WKUP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

OTG_HS_EP1_IN_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

OTG_HS_EP1_OUT_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

OTG_HS_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

OTG_HS_WKUP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

PVD_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

RCC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

RTC_Alarm_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

RTC_WKUP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

SDIO_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

SPI1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

SPI2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

SPI3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

TAMP_STAMP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

TIM1_BRK_TIM9_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

TIM1_CC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

TIM1_TRG_COM_TIM11_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

TIM1_UP_TIM10_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

TIM2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

TIM3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

TIM4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

TIM5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

TIM6_DAC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

TIM7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

TIM8_BRK_TIM12_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

TIM8_CC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

TIM8_TRG_COM_TIM14_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

TIM8_UP_TIM13_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

UART4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

UART5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

USART1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

USART2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

USART3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

USART6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

WWDG_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f2xx.o(.text))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

__aeabi_uldivmod (Thumb, 98 bytes, Stack size 40 bytes, uldiv.o(.text), UNUSED)

[Calls]

• >>   __aeabi_llsr
• >>   __aeabi_llsl

• >>   _printf_core

__aeabi_llsl (Thumb, 30 bytes, Stack size 0 bytes, llshl.o(.text), UNUSED)

[Called By]

• >>   __aeabi_uldivmod

_ll_shift_l (Thumb, 0 bytes, Stack size 0 bytes, llshl.o(.text), UNUSED)

__aeabi_llsr (Thumb, 32 bytes, Stack size 0 bytes, llushr.o(.text), UNUSED)

[Called By]

• >>   __aeabi_uldivmod

_ll_ushift_r (Thumb, 0 bytes, Stack size 0 bytes, llushr.o(.text), UNUSED)

__scatterload (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))

[Calls]

• >>   __main_after_scatterload

• >>   _main_scatterload

__scatterload_rt2 (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)

BusFault_Handler (Thumb, 4 bytes, Stack size 0 bytes, stm32f2xx_it.o(i.BusFault_Handler))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

DebugMon_Handler (Thumb, 2 bytes, Stack size 0 bytes, stm32f2xx_it.o(i.DebugMon_Handler))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

Debug_USART_Config (Thumb, 128 bytes, Stack size 32 bytes, usart.o(i.Debug_USART_Config))

[Stack]

• Max Depth = 100
• Call Chain = Debug_USART_Config ⇒ USART_Init ⇒ RCC_GetClocksFreq

• >>   GPIO_PinAFConfig
• >>   GPIO_Init
• >>   USART_Init
• >>   USART_Cmd
• >>   RCC_APB2PeriphClockCmd
• >>   RCC_AHB1PeriphClockCmd

• >>   main

FSMC_NANDCmd (Thumb, 82 bytes, Stack size 0 bytes, stm32f2xx_fsmc.o(i.FSMC_NANDCmd))

[Called By]

• >>   FSMC_NAND_Init

FSMC_NANDInit (Thumb, 132 bytes, Stack size 12 bytes, stm32f2xx_fsmc.o(i.FSMC_NANDInit))

[Stack]

• Max Depth = 12
• Call Chain = FSMC_NANDInit

• >>   FSMC_NAND_Init

FSMC_NORSRAMCmd (Thumb, 46 bytes, Stack size 0 bytes, stm32f2xx_fsmc.o(i.FSMC_NORSRAMCmd))

[Called By]

• >>   FSMC_SRAM_Init

FSMC_NORSRAMInit (Thumb, 230 bytes, Stack size 0 bytes, stm32f2xx_fsmc.o(i.FSMC_NORSRAMInit))

[Called By]

• >>   FSMC_SRAM_Init

FSMC_SRAM_Init (Thumb, 106 bytes, Stack size 96 bytes, sram.o(i.FSMC_SRAM_Init))

[Stack]

• Max Depth = 132
• Call Chain = FSMC_SRAM_Init ⇒ SRAM_GPIO_Config ⇒ GPIO_PinAFConfig

• >>   FSMC_NORSRAMInit
• >>   FSMC_NORSRAMCmd
• >>   RCC_AHB3PeriphClockCmd
• >>   SRAM_GPIO_Config

• >>   main

GPIO_Init (Thumb, 144 bytes, Stack size 20 bytes, stm32f2xx_gpio.o(i.GPIO_Init))

[Stack]

• Max Depth = 20
• Call Chain = GPIO_Init

• >>   Debug_USART_Config
• >>   FSMC_NAND_Init
• >>   SRAM_GPIO_Config

GPIO_PinAFConfig (Thumb, 70 bytes, Stack size 20 bytes, stm32f2xx_gpio.o(i.GPIO_PinAFConfig))

[Stack]

• Max Depth = 20
• Call Chain = GPIO_PinAFConfig

• >>   Debug_USART_Config
• >>   FSMC_NAND_Init
• >>   SRAM_GPIO_Config

GPIO_ReadInputDataBit (Thumb, 18 bytes, Stack size 0 bytes, stm32f2xx_gpio.o(i.GPIO_ReadInputDataBit))

[Called By]

• >>   FSMC_NAND_ReadPage

HardFault_Handler (Thumb, 4 bytes, Stack size 0 bytes, stm32f2xx_it.o(i.HardFault_Handler))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

MemManage_Handler (Thumb, 4 bytes, Stack size 0 bytes, stm32f2xx_it.o(i.MemManage_Handler))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

NAND_Init (Thumb, 20 bytes, Stack size 8 bytes, nandflash.o(i.NAND_Init))

[Stack]

• Max Depth = 92
• Call Chain = NAND_Init ⇒ FSMC_NAND_Init ⇒ GPIO_PinAFConfig

• >>   NAND_BuildLUT
• >>   FSMC_NAND_Reset
• >>   FSMC_NAND_Init

• >>   main

NMI_Handler (Thumb, 2 bytes, Stack size 0 bytes, stm32f2xx_it.o(i.NMI_Handler))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

PendSV_Handler (Thumb, 2 bytes, Stack size 0 bytes, stm32f2xx_it.o(i.PendSV_Handler))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

RCC_AHB1PeriphClockCmd (Thumb, 26 bytes, Stack size 0 bytes, stm32f2xx_rcc.o(i.RCC_AHB1PeriphClockCmd))

[Called By]

• >>   Debug_USART_Config
• >>   FSMC_NAND_Init
• >>   SRAM_GPIO_Config

RCC_AHB3PeriphClockCmd (Thumb, 26 bytes, Stack size 0 bytes, stm32f2xx_rcc.o(i.RCC_AHB3PeriphClockCmd))

[Called By]

• >>   FSMC_SRAM_Init
• >>   FSMC_NAND_Init

RCC_APB2PeriphClockCmd (Thumb, 26 bytes, Stack size 0 bytes, stm32f2xx_rcc.o(i.RCC_APB2PeriphClockCmd))

[Called By]

• >>   Debug_USART_Config

RCC_GetClocksFreq (Thumb, 214 bytes, Stack size 20 bytes, stm32f2xx_rcc.o(i.RCC_GetClocksFreq))

[Stack]

• Max Depth = 20
• Call Chain = RCC_GetClocksFreq

• >>   USART_Init

SVC_Handler (Thumb, 2 bytes, Stack size 0 bytes, stm32f2xx_it.o(i.SVC_Handler))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

SysTick_Handler (Thumb, 2 bytes, Stack size 0 bytes, stm32f2xx_it.o(i.SysTick_Handler))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

SystemInit (Thumb, 74 bytes, Stack size 8 bytes, system_stm32f2xx.o(i.SystemInit))

[Stack]

• Max Depth = 20
• Call Chain = SystemInit ⇒ SetSysClock

• >>   SetSysClock

• startup_stm32f2xx.o(.text)

USART_Cmd (Thumb, 24 bytes, Stack size 0 bytes, stm32f2xx_usart.o(i.USART_Cmd))

[Called By]

• >>   Debug_USART_Config

USART_GetFlagStatus (Thumb, 26 bytes, Stack size 0 bytes, stm32f2xx_usart.o(i.USART_GetFlagStatus))

[Called By]

• >>   fputc

USART_Init (Thumb, 204 bytes, Stack size 48 bytes, stm32f2xx_usart.o(i.USART_Init))

[Stack]

• Max Depth = 68
• Call Chain = USART_Init ⇒ RCC_GetClocksFreq

• >>   RCC_GetClocksFreq

• >>   Debug_USART_Config

USART_SendData (Thumb, 8 bytes, Stack size 0 bytes, stm32f2xx_usart.o(i.USART_SendData))

[Called By]

• >>   fputc

UsageFault_Handler (Thumb, 4 bytes, Stack size 0 bytes, stm32f2xx_it.o(i.UsageFault_Handler))
[Address Reference Count : 1]

• startup_stm32f2xx.o(RESET)

__0printf$8 (Thumb, 22 bytes, Stack size 24 bytes, printf8.o(i.__0printf$8), UNUSED)

[Calls]

• >>   _printf_core

__1printf$8 (Thumb, 0 bytes, Stack size 24 bytes, printf8.o(i.__0printf$8), UNUSED)

__2printf (Thumb, 0 bytes, Stack size 24 bytes, printf8.o(i.__0printf$8))

[Stack]

• Max Depth = 24
• Call Chain = __2printf

• >>   FSMC_NAND_ReadSpare

__scatterload_copy (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)

__scatterload_null (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)

__scatterload_zeroinit (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)

fputc (Thumb, 32 bytes, Stack size 16 bytes, usart.o(i.fputc))

[Stack]

• Max Depth = 16
• Call Chain = fputc

• >>   USART_SendData
• >>   USART_GetFlagStatus

• printf8.o(i.__0printf$8)

main (Thumb, 28 bytes, Stack size 0 bytes, main.o(i.main))

[Stack]

• Max Depth = 132
• Call Chain = main ⇒ FSMC_SRAM_Init ⇒ SRAM_GPIO_Config ⇒ GPIO_PinAFConfig

• >>   my_mem_init
• >>   NAND_Init
• >>   FSMC_SRAM_Init
• >>   Debug_USART_Config

• entry9a.o(.ARM.Collect$$$$0000000B)

my_mem_init (Thumb, 54 bytes, Stack size 8 bytes, malloc.o(i.my_mem_init))

[Stack]

• Max Depth = 20
• Call Chain = my_mem_init ⇒ mymemset

• >>   mymemset

• >>   main

• malloc.o(.data)

my_mem_perused (Thumb, 54 bytes, Stack size 8 bytes, malloc.o(i.my_mem_perused))

[Stack]

• Max Depth = 8
• Call Chain = my_mem_perused

• malloc.o(.data)

mymemset (Thumb, 20 bytes, Stack size 12 bytes, malloc.o(i.mymemset))

[Stack]

• Max Depth = 12
• Call Chain = mymemset

• >>   my_mem_init

Local Symbols

SetSysClock (Thumb, 192 bytes, Stack size 12 bytes, system_stm32f2xx.o(i.SetSysClock))

[Stack]

• Max Depth = 12
• Call Chain = SetSysClock

• >>   SystemInit

SRAM_GPIO_Config (Thumb, 956 bytes, Stack size 16 bytes, sram.o(i.SRAM_GPIO_Config))

[Stack]

• Max Depth = 36
• Call Chain = SRAM_GPIO_Config ⇒ GPIO_PinAFConfig

• >>   GPIO_PinAFConfig
• >>   GPIO_Init
• >>   RCC_AHB1PeriphClockCmd

• >>   FSMC_SRAM_Init

FSMC_NAND_GetStatus (Thumb, 40 bytes, Stack size 16 bytes, nandflash.o(i.FSMC_NAND_GetStatus))

[Stack]

• Max Depth = 16
• Call Chain = FSMC_NAND_GetStatus

• >>   FSMC_NAND_ReadStatus

• >>   FSMC_NAND_Reset

FSMC_NAND_Init (Thumb, 280 bytes, Stack size 64 bytes, nandflash.o(i.FSMC_NAND_Init))

[Stack]

• Max Depth = 84
• Call Chain = FSMC_NAND_Init ⇒ GPIO_PinAFConfig

• >>   GPIO_PinAFConfig
• >>   GPIO_Init
• >>   FSMC_NANDInit
• >>   FSMC_NANDCmd
• >>   RCC_AHB3PeriphClockCmd
• >>   RCC_AHB1PeriphClockCmd

• >>   NAND_Init

FSMC_NAND_ReadPage (Thumb, 94 bytes, Stack size 24 bytes, nandflash.o(i.FSMC_NAND_ReadPage))

[Stack]

• Max Depth = 24
• Call Chain = FSMC_NAND_ReadPage

• >>   GPIO_ReadInputDataBit

• >>   FSMC_NAND_ReadSpare

FSMC_NAND_ReadSpare (Thumb, 48 bytes, Stack size 24 bytes, nandflash.o(i.FSMC_NAND_ReadSpare))

[Stack]

• Max Depth = 48
• Call Chain = FSMC_NAND_ReadSpare ⇒ FSMC_NAND_ReadPage

• >>   FSMC_NAND_ReadPage
• >>   __2printf

• >>   NAND_BuildLUT

FSMC_NAND_ReadStatus (Thumb, 38 bytes, Stack size 0 bytes, nandflash.o(i.FSMC_NAND_ReadStatus))

[Called By]

• >>   FSMC_NAND_GetStatus

FSMC_NAND_Reset (Thumb, 24 bytes, Stack size 8 bytes, nandflash.o(i.FSMC_NAND_Reset))

[Stack]

• Max Depth = 24
• Call Chain = FSMC_NAND_Reset ⇒ FSMC_NAND_GetStatus

• >>   FSMC_NAND_GetStatus

• >>   NAND_Init

NAND_BuildLUT (Thumb, 186 bytes, Stack size 16 bytes, nandflash.o(i.NAND_BuildLUT))

[Stack]

• Max Depth = 64
• Call Chain = NAND_BuildLUT ⇒ FSMC_NAND_ReadSpare ⇒ FSMC_NAND_ReadPage

• >>   FSMC_NAND_ReadSpare

• >>   NAND_Init

_printf_core (Thumb, 996 bytes, Stack size 104 bytes, printf8.o(i._printf_core), UNUSED)

[Calls]

• >>   _printf_pre_padding
• >>   _printf_post_padding
• >>   __aeabi_uldivmod

• >>   __0printf$8

_printf_post_padding (Thumb, 36 bytes, Stack size 24 bytes, printf8.o(i._printf_post_padding), UNUSED)

[Called By]

• >>   _printf_core

_printf_pre_padding (Thumb, 46 bytes, Stack size 24 bytes, printf8.o(i._printf_pre_padding), UNUSED)

[Called By]

• >>   _printf_core

Undefined Global Symbols