startup_stm32f207xx.s 18 KB

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  1. ******************* (C) COPYRIGHT 2016 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f207xx.s
  3. ;* Author : MCD Application Team
  4. ;* Description : STM32F207xx devices vector table for MDK-ARM toolchain.
  5. ;* This module performs:
  6. ;* - Set the initial SP
  7. ;* - Set the initial PC == Reset_Handler
  8. ;* - Set the vector table entries with the exceptions ISR address
  9. ;* - Branches to __main in the C library (which eventually
  10. ;* calls main()).
  11. ;* After Reset the CortexM3 processor is in Thread mode,
  12. ;* priority is Privileged, and the Stack is set to Main.
  13. ;* <<< Use Configuration Wizard in Context Menu >>>
  14. ;******************************************************************************
  15. ;* @attention
  16. ;*
  17. ;* Copyright (c) 2017 STMicroelectronics.
  18. ;* All rights reserved.
  19. ;*
  20. ;* This software component is licensed by ST under BSD 3-Clause license,
  21. ;* the "License"; You may not use this file except in compliance with the
  22. ;* License. You may obtain a copy of the License at:
  23. ;* opensource.org/licenses/BSD-3-Clause
  24. ;*
  25. ;******************************************************************************
  26. ; Amount of memory (in bytes) allocated for Stack
  27. ; Tailor this value to your application needs
  28. ; <h> Stack Configuration
  29. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  30. ; </h>
  31. Stack_Size EQU 0x2000
  32. AREA STACK, NOINIT, READWRITE, ALIGN=3
  33. Stack_Mem SPACE Stack_Size
  34. __initial_sp
  35. ; <h> Heap Configuration
  36. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  37. ; </h>
  38. Heap_Size EQU 0x1000
  39. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  40. __heap_base
  41. Heap_Mem SPACE Heap_Size
  42. __heap_limit
  43. PRESERVE8
  44. THUMB
  45. ; Vector Table Mapped to Address 0 at Reset
  46. AREA RESET, DATA, READONLY
  47. EXPORT __Vectors
  48. EXPORT __Vectors_End
  49. EXPORT __Vectors_Size
  50. __Vectors DCD __initial_sp ; Top of Stack
  51. DCD Reset_Handler ; Reset Handler
  52. DCD NMI_Handler ; NMI Handler
  53. DCD HardFault_Handler ; Hard Fault Handler
  54. DCD MemManage_Handler ; MPU Fault Handler
  55. DCD BusFault_Handler ; Bus Fault Handler
  56. DCD UsageFault_Handler ; Usage Fault Handler
  57. DCD 0 ; Reserved
  58. DCD 0 ; Reserved
  59. DCD 0 ; Reserved
  60. DCD 0 ; Reserved
  61. DCD SVC_Handler ; SVCall Handler
  62. DCD DebugMon_Handler ; Debug Monitor Handler
  63. DCD 0 ; Reserved
  64. DCD PendSV_Handler ; PendSV Handler
  65. DCD SysTick_Handler ; SysTick Handler
  66. ; External Interrupts
  67. DCD WWDG_IRQHandler ; Window WatchDog
  68. DCD PVD_IRQHandler ; PVD through EXTI Line detection
  69. DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
  70. DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
  71. DCD FLASH_IRQHandler ; FLASH
  72. DCD RCC_IRQHandler ; RCC
  73. DCD EXTI0_IRQHandler ; EXTI Line0
  74. DCD EXTI1_IRQHandler ; EXTI Line1
  75. DCD EXTI2_IRQHandler ; EXTI Line2
  76. DCD EXTI3_IRQHandler ; EXTI Line3
  77. DCD EXTI4_IRQHandler ; EXTI Line4
  78. DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
  79. DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
  80. DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
  81. DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
  82. DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
  83. DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
  84. DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
  85. DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
  86. DCD CAN1_TX_IRQHandler ; CAN1 TX
  87. DCD CAN1_RX0_IRQHandler ; CAN1 RX0
  88. DCD CAN1_RX1_IRQHandler ; CAN1 RX1
  89. DCD CAN1_SCE_IRQHandler ; CAN1 SCE
  90. DCD EXTI9_5_IRQHandler ; External Line[9:5]s
  91. DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
  92. DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
  93. DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
  94. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  95. DCD TIM2_IRQHandler ; TIM2
  96. DCD TIM3_IRQHandler ; TIM3
  97. DCD TIM4_IRQHandler ; TIM4
  98. DCD I2C1_EV_IRQHandler ; I2C1 Event
  99. DCD I2C1_ER_IRQHandler ; I2C1 Error
  100. DCD I2C2_EV_IRQHandler ; I2C2 Event
  101. DCD I2C2_ER_IRQHandler ; I2C2 Error
  102. DCD SPI1_IRQHandler ; SPI1
  103. DCD SPI2_IRQHandler ; SPI2
  104. DCD USART1_IRQHandler ; USART1
  105. DCD USART2_IRQHandler ; USART2
  106. DCD USART3_IRQHandler ; USART3
  107. DCD EXTI15_10_IRQHandler ; External Line[15:10]s
  108. DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
  109. DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
  110. DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
  111. DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
  112. DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
  113. DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
  114. DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
  115. DCD FSMC_IRQHandler ; FSMC
  116. DCD SDIO_IRQHandler ; SDIO
  117. DCD TIM5_IRQHandler ; TIM5
  118. DCD SPI3_IRQHandler ; SPI3
  119. DCD UART4_IRQHandler ; UART4
  120. DCD UART5_IRQHandler ; UART5
  121. DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
  122. DCD TIM7_IRQHandler ; TIM7
  123. DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
  124. DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
  125. DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
  126. DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
  127. DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
  128. DCD ETH_IRQHandler ; Ethernet
  129. DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
  130. DCD CAN2_TX_IRQHandler ; CAN2 TX
  131. DCD CAN2_RX0_IRQHandler ; CAN2 RX0
  132. DCD CAN2_RX1_IRQHandler ; CAN2 RX1
  133. DCD CAN2_SCE_IRQHandler ; CAN2 SCE
  134. DCD OTG_FS_IRQHandler ; USB OTG FS
  135. DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
  136. DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
  137. DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
  138. DCD USART6_IRQHandler ; USART6
  139. DCD I2C3_EV_IRQHandler ; I2C3 event
  140. DCD I2C3_ER_IRQHandler ; I2C3 error
  141. DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
  142. DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
  143. DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
  144. DCD OTG_HS_IRQHandler ; USB OTG HS
  145. DCD DCMI_IRQHandler ; DCMI
  146. DCD 0 ; Reserved
  147. DCD HASH_RNG_IRQHandler ; Hash and Rng
  148. __Vectors_End
  149. __Vectors_Size EQU __Vectors_End - __Vectors
  150. AREA |.text|, CODE, READONLY
  151. ; Reset handler
  152. Reset_Handler PROC
  153. EXPORT Reset_Handler [WEAK]
  154. IMPORT SystemInit
  155. IMPORT __main
  156. LDR R0, =SystemInit
  157. BLX R0
  158. LDR R0, =__main
  159. BX R0
  160. ENDP
  161. ; Dummy Exception Handlers (infinite loops which can be modified)
  162. NMI_Handler PROC
  163. EXPORT NMI_Handler [WEAK]
  164. B .
  165. ENDP
  166. HardFault_Handler\
  167. PROC
  168. EXPORT HardFault_Handler [WEAK]
  169. B .
  170. ENDP
  171. MemManage_Handler\
  172. PROC
  173. EXPORT MemManage_Handler [WEAK]
  174. B .
  175. ENDP
  176. BusFault_Handler\
  177. PROC
  178. EXPORT BusFault_Handler [WEAK]
  179. B .
  180. ENDP
  181. UsageFault_Handler\
  182. PROC
  183. EXPORT UsageFault_Handler [WEAK]
  184. B .
  185. ENDP
  186. SVC_Handler PROC
  187. EXPORT SVC_Handler [WEAK]
  188. B .
  189. ENDP
  190. DebugMon_Handler\
  191. PROC
  192. EXPORT DebugMon_Handler [WEAK]
  193. B .
  194. ENDP
  195. PendSV_Handler PROC
  196. EXPORT PendSV_Handler [WEAK]
  197. B .
  198. ENDP
  199. SysTick_Handler PROC
  200. EXPORT SysTick_Handler [WEAK]
  201. B .
  202. ENDP
  203. Default_Handler PROC
  204. EXPORT WWDG_IRQHandler [WEAK]
  205. EXPORT PVD_IRQHandler [WEAK]
  206. EXPORT TAMP_STAMP_IRQHandler [WEAK]
  207. EXPORT RTC_WKUP_IRQHandler [WEAK]
  208. EXPORT FLASH_IRQHandler [WEAK]
  209. EXPORT RCC_IRQHandler [WEAK]
  210. EXPORT EXTI0_IRQHandler [WEAK]
  211. EXPORT EXTI1_IRQHandler [WEAK]
  212. EXPORT EXTI2_IRQHandler [WEAK]
  213. EXPORT EXTI3_IRQHandler [WEAK]
  214. EXPORT EXTI4_IRQHandler [WEAK]
  215. EXPORT DMA1_Stream0_IRQHandler [WEAK]
  216. EXPORT DMA1_Stream1_IRQHandler [WEAK]
  217. EXPORT DMA1_Stream2_IRQHandler [WEAK]
  218. EXPORT DMA1_Stream3_IRQHandler [WEAK]
  219. EXPORT DMA1_Stream4_IRQHandler [WEAK]
  220. EXPORT DMA1_Stream5_IRQHandler [WEAK]
  221. EXPORT DMA1_Stream6_IRQHandler [WEAK]
  222. EXPORT ADC_IRQHandler [WEAK]
  223. EXPORT CAN1_TX_IRQHandler [WEAK]
  224. EXPORT CAN1_RX0_IRQHandler [WEAK]
  225. EXPORT CAN1_RX1_IRQHandler [WEAK]
  226. EXPORT CAN1_SCE_IRQHandler [WEAK]
  227. EXPORT EXTI9_5_IRQHandler [WEAK]
  228. EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
  229. EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
  230. EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
  231. EXPORT TIM1_CC_IRQHandler [WEAK]
  232. EXPORT TIM2_IRQHandler [WEAK]
  233. EXPORT TIM3_IRQHandler [WEAK]
  234. EXPORT TIM4_IRQHandler [WEAK]
  235. EXPORT I2C1_EV_IRQHandler [WEAK]
  236. EXPORT I2C1_ER_IRQHandler [WEAK]
  237. EXPORT I2C2_EV_IRQHandler [WEAK]
  238. EXPORT I2C2_ER_IRQHandler [WEAK]
  239. EXPORT SPI1_IRQHandler [WEAK]
  240. EXPORT SPI2_IRQHandler [WEAK]
  241. EXPORT USART1_IRQHandler [WEAK]
  242. EXPORT USART2_IRQHandler [WEAK]
  243. EXPORT USART3_IRQHandler [WEAK]
  244. EXPORT EXTI15_10_IRQHandler [WEAK]
  245. EXPORT RTC_Alarm_IRQHandler [WEAK]
  246. EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
  247. EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
  248. EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
  249. EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
  250. EXPORT TIM8_CC_IRQHandler [WEAK]
  251. EXPORT DMA1_Stream7_IRQHandler [WEAK]
  252. EXPORT FSMC_IRQHandler [WEAK]
  253. EXPORT SDIO_IRQHandler [WEAK]
  254. EXPORT TIM5_IRQHandler [WEAK]
  255. EXPORT SPI3_IRQHandler [WEAK]
  256. EXPORT UART4_IRQHandler [WEAK]
  257. EXPORT UART5_IRQHandler [WEAK]
  258. EXPORT TIM6_DAC_IRQHandler [WEAK]
  259. EXPORT TIM7_IRQHandler [WEAK]
  260. EXPORT DMA2_Stream0_IRQHandler [WEAK]
  261. EXPORT DMA2_Stream1_IRQHandler [WEAK]
  262. EXPORT DMA2_Stream2_IRQHandler [WEAK]
  263. EXPORT DMA2_Stream3_IRQHandler [WEAK]
  264. EXPORT DMA2_Stream4_IRQHandler [WEAK]
  265. EXPORT ETH_IRQHandler [WEAK]
  266. EXPORT ETH_WKUP_IRQHandler [WEAK]
  267. EXPORT CAN2_TX_IRQHandler [WEAK]
  268. EXPORT CAN2_RX0_IRQHandler [WEAK]
  269. EXPORT CAN2_RX1_IRQHandler [WEAK]
  270. EXPORT CAN2_SCE_IRQHandler [WEAK]
  271. EXPORT OTG_FS_IRQHandler [WEAK]
  272. EXPORT DMA2_Stream5_IRQHandler [WEAK]
  273. EXPORT DMA2_Stream6_IRQHandler [WEAK]
  274. EXPORT DMA2_Stream7_IRQHandler [WEAK]
  275. EXPORT USART6_IRQHandler [WEAK]
  276. EXPORT I2C3_EV_IRQHandler [WEAK]
  277. EXPORT I2C3_ER_IRQHandler [WEAK]
  278. EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
  279. EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
  280. EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
  281. EXPORT OTG_HS_IRQHandler [WEAK]
  282. EXPORT DCMI_IRQHandler [WEAK]
  283. EXPORT HASH_RNG_IRQHandler [WEAK]
  284. WWDG_IRQHandler
  285. PVD_IRQHandler
  286. TAMP_STAMP_IRQHandler
  287. RTC_WKUP_IRQHandler
  288. FLASH_IRQHandler
  289. RCC_IRQHandler
  290. EXTI0_IRQHandler
  291. EXTI1_IRQHandler
  292. EXTI2_IRQHandler
  293. EXTI3_IRQHandler
  294. EXTI4_IRQHandler
  295. DMA1_Stream0_IRQHandler
  296. DMA1_Stream1_IRQHandler
  297. DMA1_Stream2_IRQHandler
  298. DMA1_Stream3_IRQHandler
  299. DMA1_Stream4_IRQHandler
  300. DMA1_Stream5_IRQHandler
  301. DMA1_Stream6_IRQHandler
  302. ADC_IRQHandler
  303. CAN1_TX_IRQHandler
  304. CAN1_RX0_IRQHandler
  305. CAN1_RX1_IRQHandler
  306. CAN1_SCE_IRQHandler
  307. EXTI9_5_IRQHandler
  308. TIM1_BRK_TIM9_IRQHandler
  309. TIM1_UP_TIM10_IRQHandler
  310. TIM1_TRG_COM_TIM11_IRQHandler
  311. TIM1_CC_IRQHandler
  312. TIM2_IRQHandler
  313. TIM3_IRQHandler
  314. TIM4_IRQHandler
  315. I2C1_EV_IRQHandler
  316. I2C1_ER_IRQHandler
  317. I2C2_EV_IRQHandler
  318. I2C2_ER_IRQHandler
  319. SPI1_IRQHandler
  320. SPI2_IRQHandler
  321. USART1_IRQHandler
  322. USART2_IRQHandler
  323. USART3_IRQHandler
  324. EXTI15_10_IRQHandler
  325. RTC_Alarm_IRQHandler
  326. OTG_FS_WKUP_IRQHandler
  327. TIM8_BRK_TIM12_IRQHandler
  328. TIM8_UP_TIM13_IRQHandler
  329. TIM8_TRG_COM_TIM14_IRQHandler
  330. TIM8_CC_IRQHandler
  331. DMA1_Stream7_IRQHandler
  332. FSMC_IRQHandler
  333. SDIO_IRQHandler
  334. TIM5_IRQHandler
  335. SPI3_IRQHandler
  336. UART4_IRQHandler
  337. UART5_IRQHandler
  338. TIM6_DAC_IRQHandler
  339. TIM7_IRQHandler
  340. DMA2_Stream0_IRQHandler
  341. DMA2_Stream1_IRQHandler
  342. DMA2_Stream2_IRQHandler
  343. DMA2_Stream3_IRQHandler
  344. DMA2_Stream4_IRQHandler
  345. ETH_IRQHandler
  346. ETH_WKUP_IRQHandler
  347. CAN2_TX_IRQHandler
  348. CAN2_RX0_IRQHandler
  349. CAN2_RX1_IRQHandler
  350. CAN2_SCE_IRQHandler
  351. OTG_FS_IRQHandler
  352. DMA2_Stream5_IRQHandler
  353. DMA2_Stream6_IRQHandler
  354. DMA2_Stream7_IRQHandler
  355. USART6_IRQHandler
  356. I2C3_EV_IRQHandler
  357. I2C3_ER_IRQHandler
  358. OTG_HS_EP1_OUT_IRQHandler
  359. OTG_HS_EP1_IN_IRQHandler
  360. OTG_HS_WKUP_IRQHandler
  361. OTG_HS_IRQHandler
  362. DCMI_IRQHandler
  363. HASH_RNG_IRQHandler
  364. B .
  365. ENDP
  366. ALIGN
  367. ;*******************************************************************************
  368. ; User Stack and Heap initialization
  369. ;*******************************************************************************
  370. IF :DEF:__MICROLIB
  371. EXPORT __initial_sp
  372. EXPORT __heap_base
  373. EXPORT __heap_limit
  374. ELSE
  375. IMPORT __use_two_region_memory
  376. EXPORT __user_initial_stackheap
  377. __user_initial_stackheap
  378. LDR R0, = Heap_Mem
  379. LDR R1, =(Stack_Mem + Stack_Size)
  380. LDR R2, = (Heap_Mem + Heap_Size)
  381. LDR R3, = Stack_Mem
  382. BX LR
  383. ALIGN
  384. ENDIF
  385. END
  386. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****