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fpga-hw-ci-staging
fpga-preflight-581025b29097
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Business-code
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fpga
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fpga_pwm_trace_project
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constraints
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pwm_trace.sdc
pwm_trace.sdc
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# 25 MHz system clock
create_clock -name sys_clk -period 40 -waveform {0 20} [get_ports sys_clk]